Synthesis of Heterogeneous Multi Processor System-on-Chip with Optical Interconnect

嵌入式系统的市场正在迅速增长，而应用程序正在设计，以暴露底层算法的固有并行性。传统的处理器和片上通信架构不能很好地扩展嵌入式应用的严格性能和功耗要求。芯片设计的当前趋势表明，芯片上的晶体管数量越来越多，各种技术的芯片上可用性也越来越大。这些趋势使得能够制造与集成光通信架构互连的多处理器芯片。该技术有望创建提供高性能和低功耗的系统。然而，这种系统的手动设计是耗时且容易出错的过程，从而对这种系统的成本和质量产生负面影响。 本研究计划的长期目标是从并行应用模型中自动合成与最有效的通信架构互连的处理元件的最佳集合。我们建议使用专用处理器（ASP）的系统的计算部分，和集成光学互连架构。在接下来的五年里，我们建议开发：（1）自动合成的ASP核心从并行应用程序模型，（2）新的方法和工具，以促进有效的设计和评估的可扩展的光网络片上给定的功率，性能和可靠性的约束，和（3）自动映射的并行应用程序的系统与光网络的异构ASP核心。我们将使用来自消费电子，生物医疗和航空电子应用领域的应用来推动我们的研究工作。这些应用领域是加拿大经济的关键驱动力，有效实施这些应用的解决方案将为加拿大设计公司提供竞争优势。

The market for embedded systems is growing rapidly while applications are being designed to expose the inherent parallelism of the underlying algorithms. Conventional processors and on-chip communication architectures do not scale well with the stringent performance and power requirements of embedded applications. Current trends in chip design indicate increasing number of transistors on chip and on-chip availability of diverse technologies. These trends have enabled the fabrication of multi-processor chips interconnected with integrated optical communication architectures. This technology promises to create systems that provide high performance and low power consumption. However, the manual design of such systems is a time consuming and error prone process, thereby negatively impacting the cost and quality of such systems. The long term objective, addressed by this research program, is to automatically synthesize the optimal set of processing elements interconnected with the most efficient communication architecture from a parallel application model. We propose the use of application specific processors (ASPs) for the computational part of the system, and integrated optics for the interconnect architecture. Over the next five years, we propose to develop: (1) automatic synthesis of ASP cores from parallel application models, (2) novel methodologies and tools to facilitate efficient design and evaluation of scalable Optical Network-on-Chip for given power, performance and reliability constrains, and (3) automatic mapping of parallel applications to systems with optical network of heterogeneous ASP cores. We will use applications from consumer electronics, bio-medical, and avionics application domains to drive our research efforts. These application domains are key drivers of the Canadian economy and solutions for efficient implementation of such applications will provide the competitive edge to Canadian design companies.