Simulation and Performance Optimization of Large-Scale Systems in the Presence of Uncertainties

全球电子工业的迅猛发展正在不断推出以更高频率和比特率运行的新产品。在如此高的数据速率下，高频效应成为限制微电子系统整体性能的主要因素。此外，多功能和微型产品需求的快速增长也为异构电路模块的集成提供了必要条件。因此，不同设计领域之间的传统界限正在迅速消失。此外，几何和物理参数的可变性及其对系统性能的影响是另一个主要问题。这种不确定性在设计层次的各个层面都是不可避免的。例如，制造的不确定性会显著影响片上互连的性能，导致时序变化，这种变化会传播到电路或电路板层面，对整个系统性能和良率产生负面影响。该研究提案呼吁通过促进“不确定性设计”作为设计过程中的主要成分，在潜在设计算法和方法的发展中进行范式转变。作为实现这一目标的一步，几个计划中的研究活动集中在开发专门的随机算法来模拟和模拟设计层次不同层次的底层统计信息。此外，将开发系统的方法将这些算法纳入设计周期，以实现最优的设计定心。计划中的研究解决了高速应用中常见的一般战略问题，并将在广泛的相关主题中推进最新技术。拟议研究的成功将为设计师提供有效规划和设计目前不可行的大规模系统的能力；从而生产出更优质、更可靠的多功能电子通讯产品。此外，所提出的研究的好处不仅限于高速电子系统的设计，因为大规模和不确定性量化挑战是工程和科学中其他几个领域的共同问题。

Therapid evolution of the global electronic industry is unceasingly introducingnew products operating at ever higher frequencies and bitrates. At such highdata rates, high-frequency effects become the dominant factor limiting theoverall performance of microelectronic systems. In addition, the fast risingdemand for multifunction and miniature products warrants integration ofheterogeneous circuit modules. As a result, the traditional boundaries betweendifferent design domains are fast vanishing. Moreover, variability of thegeometrical and physical parameters and its effect on the system performance isadding another major concern. This uncertainty becomes inevitable at all levelsof the design hierarchy. For example, manufacturing uncertainties cansignificantly influence the performance of on-chip interconnects, leading totiming variations that can propagate to the circuit or board level withnegative impact on the whole system performance and yield. The researchproposal calls for a paradigm shift in the development of the underlying designalgorithms and methodologies by promoting “Design for Uncertainties” as a majoringredient in the design process. As a step towards this goal, several of theplanned research activities are focused on the development of specializedstochastic algorithms to model and simulate the underlying statisticalinformation at different levels of the design hierarchy. In addition,systematic methods will be developed to incorporate these algorithms in thedesign cycle to achieve optimal design centering. The planned researchaddresses generic strategic issues common to high-speed applications and willadvance the state-of-art in a broad spectrum of interrelated topics. Thesuccess of the proposed research will provide designers with the ability toefficiently plan and design large-scale systems that are not currentlyfeasible; resulting in superior and more reliable multi-function electronic andcommunication products. In addition, the benefits of the proposed research are notlimited to the design of high-speed electronic systems since large-scale anduncertainty quantification challenges are common issues in several other fieldswithin engineering and science.