先进工艺下的生物电信号感知模拟前端全集成抗干扰关键技术研究

智能化柔性化微型化是可穿戴设备的未来趋势。智能微型的生物传感接口芯片是关键。先进工艺有利于提升整体系统级芯片性能，但小尺寸晶体管的漏电流、噪声恶化以及低电源电压等给抗干扰生物电信号模拟前端（AFE）的全集成实现带来了严峻挑战。本项目创新性地通过对输入信号进行电容采样追踪，将其信号细节始终捕捉在预设的微窗口内，大幅提高了低电源电压下的AFE动态范围，有效避免了运动伪影干扰饱和问题。提出采用斩波调制、多回路补偿与校准等多技术相结合的方式提高AFE的整体性能；首次提出双电容二阶斩波技术以进一步提高AFE噪声性能；提出虚拟电阻片上校准技术，降低对漏电依赖，以全集成的方式实现极低高通截止频率。项目将会分别从模型、电路、版图等层面进行设计仿真、流片验证。该方案有望解决智能生物信号传感设备对自由状态下的生物电信号采集中面临的多种干扰问题，对可穿戴设备在多种场景下的广泛应用具有重要的研究意义与经济价值。

Smart, flexibilization and miniaturization are the future of wearables. Intelligent and tiny biomedical sensor interface is the enabling technology of such wearables. Although advanced process can significantly enhance the system performance of the biomedical system-on-chip (SoC) sensor interface, not only the degradation of transistor leakage and noise due to the shrink of the critical dimension but also the scaling down of the power supply poses more challenges than ever on the implementation of artifacts tolerant analog front-end (AFE) for electrical biomedical signals monitoring in a fully integrated way. In this project, we propose to shift and capture the input signal via sampling capacitors to track the signal details always within a tiny amplitude window predefined by us, which could effectively enhance the dynamic range of the AFE especially under low power supply voltage and thus avoid the output saturation of the AFE due to the motion artifacts. Besides, we propose to use several state-of-the-arts techniques including chopper stabilization, multiple loops compensation and on-chip calibration for the guarantee of the entire high performance of AFE in addition to dynamic range. For the deteriorated transistor noise in advanced process, we are the first time to propose a second-order chopper stabilized technique for further suppression of the AFE noise. In terms of degraded leakage issue, we will study on-chip calibration technique to eliminate the leakage dependence of the giga-ohm level small area pseudo resistor for the realization of extremely low high-pass cut-off frequency in a fully integrated manner. This project will try to conduct researches on the design, simulation, implementation and verification of the models, circuits, layouts, and chip testing. The successful completion of this research is expected to address the annoying yet commonly found artifacts confronted by biomedical devices for freely biomedical signal monitoring in daily life, which is of great importance and value in both research and economics for the wide adoption of smart wearable devices in diverse application scenarios.