大功率IGCT器件关断瞬态的电流动态分布机理研究与均流优化

功率半导体器件是直流断路器等直流电网装备的核心元件。集成门极换流晶闸管（IGCT）通态损耗低、浪涌电流大、抗干扰能力强，符合直流装备大容量、高可靠的发展需求。但IGCT芯片由数千元胞并联组成，关断瞬态电流分布严重不均衡，是限制关断电流等级、直流装备扩容的瓶颈。.本项目以提升IGCT器件关断电流等级为目标，对器件内部电流动态分布机理与均流方法展开研究：突破压接式封闭管壳限制，从整体器件、芯片局部并联、元胞并联三个层级实现器件内部关断瞬态电流分布的宽频高精度测量；揭示元胞特性差异和空间结构不对称导致电流动态分布的物理机理；综合考虑半导体物理过程与换流路径电磁耦合作用，建立兼顾求解精度与计算速度的电流分布仿真模型；最后从芯片掺杂及元胞排布、封装驱动等方面提出均流定量优化方法。项目研究成果将为功率半导体器件电流分布理论建模与实验测量提供新思路和新方法，为优化均流特性、提升电流等级奠定理论基础。

Power electronic device is the core component of power electronic equipment in DC power grid, such as dc circuit breaker. Integrated gate commutated thyristor (IGCT) is a kind of turn-off thyristor-based devices. It has low on-state loss and high robustness, which is consistent with the demand of DC equipment with large capacity and high reliability. However, during the turn-off process, a critical current distribution unevenness has been found between the thousands of paralleled cells on the IGCT wafer, which has become the bottleneck of enhancing IGCT turn-off current, as well as increasing the capacity of DC equipment..In this project, in order to enhance the maximum turn-off current of IGCT, the research on current dynamic distribution mechanism and current balance optimization method is conducted. Firstly, the current distribution measurement with wide frequency range and high accuracy is achieved from three aspects (whole device, parts of wafer and paralleled cells) breaking through the limitation of the closed press-pack housing. Then, the physical mechanism of current distribution during turn-off transient yield by the inconsistency of cell characteristics and asymmetry of spatial structure is analyzed. Next, a current distribution model with acceptable solution accuracy and calculation speed is established, comprehensively considering the semiconductor physical process and the electromagnetic coupling interaction of different commutation loops. Finally, the optimization methods to balance the current distribution are proposed, from the aspects of wafer doping design, cells arrangement, gate driver and package. The research of this project will provide new ideas and methods for theoretical modeling and experimental measurement of current distribution in the power electronic devices, and lay a theoretical foundation for balancing current distribution and improving current level.