112Gb/s四电平脉冲调制串行接口高速均衡技术研究
批准号:
62104255
项目类别:
青年科学基金项目(C类)
资助金额:
30.0 万元
负责人:
丁浩
依托单位:
学科分类:
集成电路设计
结题年份:
2024
批准年份:
2021
项目状态:
已结题
项目参与者:
丁浩
中文摘要
基于四电平脉冲调制的高速串行接口均衡技术是高速数据中心的核心技术之一,是军事气象预测、弹道导弹预警等新型作战支援行动的技术支撑。随着串行接口传输速率迈入112Gb/s,现有技术方案面临着频率补偿范围不足、功耗剧增、输出摆幅和线性度不足的瓶颈。本项目从高速数据中心的应用背景出发,拟针对112Gb/s 四电平脉冲调制高速串行接口的均衡技术开展研究:开发包括基于部分码元间隔的前馈均衡架构、组合式连续时间线性均衡架构的宽频带补偿技术,开发包括电压模驱动器和合路器、采用预判决技术和新型采样判决电路的判决反馈均衡器等低功耗技术,开发包括前馈均衡预加重技术、连续时间线性均衡电平移位技术的大摆幅高线性输出技术,并通过流片测试进行验证。本项目立足国防和军事需求,对于争夺国防科技制高点和主动权具有重要战略意义,研究成果可在远程医疗、自动驾驶等民用领域推广,对于打破国外垄断,推动产业发展具有重要经济价值。
英文摘要
The equalization for high-speed serial interface based on Four Level Pulse Amplitude Modulation, is one of the key technologies of the high-speed data centers. It plays an irreplaceable role in the combat support operations including military weather forecast, ballistic missile warning and so on. As the data rate of serial interface steps into 112Gb/s, current technical solutions are faced with new bottlenecks, such as the narrow frequency compensation range, sharp-increasing power consumption, insufficient output swing and linearity. Based on the application in high-speed data center, this project aims to study the equalization technologies for 112Gb/s high-speed serial interface using Four Level Pulse Amplitude Modulation. The research contents include: broadband compensation technology comprised of fractional-spaced feed-forward equalizing architecture, combined continuous-time linear equalizer; low-power technology consisting of drivers and combiners based on voltage mode logic, decision feedback equalizer using speculative technology and new sample-and-encode circuits; large-swing and high-linearity output technology including pre-emphasis in feed forward equalizer, level-shifting in continuous-time linear equalizer. These above technologies will be verified by tape-out and measurements. This project is supposed to meet the defense needs and military requirements, which is strategically important for snatching commanding heights and initiative of defense technologies. The expected research achievements can be widely used in the civil telemedicine and autopilot, which can break the foreign monopolies, promote industry development and create huge economic value.
大数据的蓬勃发展引发了对数据传输需求的爆发式增长,芯片间串行接口的吞吐能力成为制约新一轮科技革命的关键瓶颈。随着对传输速率的需求向112Gb/s以上迈进,PAM-4调制(Pulse Amplitude Modulation-4,四电平脉冲幅度调制)由于可以降低奈奎斯特频率处损耗、实现加倍的数据传输速率,逐渐取代NRZ成为了高速串口的主流调制方式。本项目深入研究了PAM-4串口超高速设计技术,并采用低成本65nm CMOS工艺进行了流片验证,具体内容包括:.(1)基于部分码元间隔的前馈均衡。本项目通过分析得出了转换抖动与信道带宽成反比的结论,在此基础上提出了基于部分码元间隔的前馈均衡架构。与传统前馈均衡不同,该架构通过调整抽头间隔可以获得远超奈奎斯特频率的补偿范围,扩展了信道带宽,并且抽头间隔可以和均衡强度配合调整消除过均衡的影响,最终解决了转换抖动压缩眼图的挑战。.(2)基于电平移位的连续时间线性均衡。区别于传统设计思路,本项目在PAM-4信号在进入CTLE之前,先经过基于AC耦合的电平移位器,将PAM-4信号三个眼的阈值均移位至0V, 因为CTLE的非线性对以0V为阈值的眼的压缩程度较小,因此降低了对CTLE线性度的要求,解决了输出摆幅和线性度相互制约的问题。.(3)高速宽带判决反馈均衡。与传统PAM-4 DFE将判决后的三位温度计码全部返回同一个均衡抽头不同,本文在三路采样判决器中各设置了一个DFE,使返回均衡抽头的数据由三路减小为一路,降低了求和器负载,同时引入采样开关和带宽扩展时钟,提升了采样和判决速度。上述两个措施综合起来降低了环路延迟,解决了时序裕度紧张的问题。
射频通道强电磁压制与毁伤综合防护芯片关键技术研究
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批准号:2025JJ40064
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项目类别:省市级项目
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资助金额:0.0万元
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批准年份:2025
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负责人:丁浩
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依托单位:
国内基金
海外基金