Spector: An OpenCL FPGA benchmark suite
Spector: An OpenCL FPGA benchmark suite
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Spector：OpenCL FPGA 基准测试套件
DOI：
10.1109/fpt.2016.7929519
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发表时间：
2016
期刊：
影响因子：
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通讯作者：
R. Kastner
中科院分区：
文献类型：
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作者：
Q. Gautier;Alric Althoff;Pingfan Meng;R. Kastner
高级综合工具允许程序员使用OpenCL创建FPGA设计。不幸的是，这些工具有一个复杂的编译过程，可能需要几个小时来合成一个单一的设计。这给设计优化带来了很大的障碍，因为即使是专家也需要测试许多设计，因为不同优化之间的交互并不明显。因此，了解设计空间，并指导优化过程是使这些高级综合工具得到广泛采用的关键要求。然而，这需要大量的设计空间数据，这些数据目前不可用或难以生成。为了解决这个问题，我们提出了一个OpenCL FPGA基准测试套件。我们为每个基准测试配备了一系列优化参数（或旋钮），使用Altera OpenCL SDK编译了8300多个独特的设计，在Terrace DE5板上执行，并记录了相应的性能和利用率特征。我们描述了由此产生的设计空间，并进行了统计分析的优化配置，提供了宝贵的架构见解FPGA开发人员。我们将基准测试和结果完全开源，为社区提供执行额外分析的机会，并为后续研究提供记录良好的设计库。
High-level synthesis tools allow programmers to use OpenCL to create FPGA designs. Unfortunately, these tools have a complex compilation process that can take several hours to synthesize a single design. This creates a significant barrier for design optimization since even experts typically need to test many designs due to the non-obvious interactions between the different optimizations. Thus, understanding the design space, and guiding the optimization process is a crucial requirement for enabling the widespread adoption of these high-level synthesis tools. However this requires a significant amount of design space data that is currently unavailable or difficult to generate. To solve this problem, we present an OpenCL FPGA benchmark suite. We outfitted each benchmark with a range of optimization parameters (or knobs), compiled over 8300 unique designs using the Altera OpenCL SDK, executed them on a Terasic DE5 board, and recorded their corresponding performance and utilization characteristics. We describe the resulting design spaces, and perform a statistical analysis of the optimization configurations which provides valuable architecture insights to FPGA developers. We make the benchmarks and results completely open-source to give opportunities for the community to perform additional analyses and provide a repository of well-documented designs for follow-on research.