Pauli frames for quantum computer architectures
Pauli frames for quantum computer architectures
复制标题
量子计算机架构的泡利框架
DOI：
10.1145/3061639.3062300
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发表时间：
2017
期刊：
影响因子：
--
通讯作者：
K. Bertels
中科院分区：
文献类型：
--
作者：
L. Riesebos;X. Fu;Savvas Varsamopoulos;C. G. Almudever;K. Bertels
泡利帧机制允许泡利门在经典电子学中被跟踪，并且可以放松错误伴随测量和错误解码的时间约束。在构建量子计算机时，这种机制可能是有益的，本文的目标不仅是研究泡利框架的工作原理，而且还要量化其对逻辑错误率的潜在影响。为此，我们实现和模拟的泡利帧模块，在原则上，可以直接映射到一个硬件实现。对表面码17逻辑量子比特的模拟表明，当解码时间等于纠错时间时，与没有泡利帧的相同逻辑量子比特相比，泡利帧可以将逻辑量子比特的错误率降低高达70%，并且可以获得最大的并行性。
The Pauli frame mechanism allows Pauli gates to be tracked in classical electronics and can relax the timing constraints for error syndrome measurement and error decoding. When building a quantum computer, such a mechanism may be beneficial, and the goal of this paper is not only to study the working principles of a Pauli frame but also to quantify its potential effect on the logical error rate. To this purpose, we implemented and simulated the Pauli frame module which, in principle, can be directly mapped into a hardware implementation. Simulation of a surface code 17 logical qubit has shown that a Pauli frame can reduce the error rate of a logical qubit up to 70% compared to the same logical qubit without Pauli frame when the decoding time equals the error correction time, and maximum parallelism can be obtained.