System-level Linking of Synthesised Hardware and Compiled Software Using a Higher-order Type System
System-level Linking of Synthesised Hardware and Compiled Software Using a Higher-order Type System
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使用高阶类型系统的综合硬件和编译软件的系统级链接
DOI：
10.1145/2684746.2689089
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发表时间：
2015
期刊：
影响因子：
--
通讯作者：
Fleming S
中科院分区：
文献类型：
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作者：
Fleming S
具有紧密耦合的CPU和FPGA逻辑的设备允许实施不同的应用，这些应用结合了以硬件和软件语言编写的多个组件，包括第一方源代码和第三方IP。组件关系的灵活性很重要，这样系统设计人员就可以随着应用程序设计的发展在软件和硬件之间移动组件。本文提出了一种系统级类型系统和链接器，它允许软件和硬件组件中的函数在链接时直接链接，而不需要对组件进行任何修改或重新编译。类型系统被设计为与语言无关，并显示出更高阶的功能，以支持从硬件功能内对软件进行通知和回调等设计模式。我们通过在Xilinx Zynq平台上将编译的软件与合成的硬件链接起来的大量案例研究来演示该系统。
Devices with tightly coupled CPUs and FPGA logic allow for the implementation of heterogeneous applications which combine multiple components written in hardware and software languages, including first-party source code and third-party IP. Flexibility in component relationships is important, so that the system designer can move components between software and hardware as the application design evolves. This paper presents a system-level type system and linker, which allows functions in software and hardware components to be directly linked at link time, without requiring any modification or recompilation of the components. The type system is designed to be language agnostic, and exhibits higher-order features, to enables design patterns such as notifications and callbacks to software from within hardware functions. We demonstrate the system through a number of case studies which link compiled software against synthesised hardware in the Xilinx Zynq platform.
Leap暂存器：用于可重新配置逻辑的自动内存和缓存管理
DOI：
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发表时间：
2010
期刊：
Symposium on Field Programmable Gate Arrays
影响因子：
--
作者：
Michael Adler;Kermin Fleming;A. Parashar;Michael Pellauer;J. Emer
通讯作者：
J. Emer