Runtime Adaptive Cache for the LEON3 Processor
Runtime Adaptive Cache for the LEON3 Processor
复制标题
LEON3 处理器的运行时自适应缓存
DOI：
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发表时间：
2018
期刊：
影响因子：
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通讯作者：
M. Hübner
中科院分区：
文献类型：
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作者：
O. Navarro;M. Hübner
高速缓存存储器是计算系统的关键组成部分，因为它们最大限度地减少了处理器和主存储器之间的延迟。然而，它们需要大量的系统总能耗。这种能量需求取决于应用程序的行为。因此，用最少的资源重新配置缓存以适应每个应用程序的内存需求将节省大量的能源。本文提出了一种能够在运行时重新配置缓存关联性的体系结构，以便使缓存适合正在执行的应用程序。该体系结构使用少量逻辑组合了缓存方式，保持了缓存的整体容量。我们在LEON3处理器模型中实现了我们的架构，并使用Xilinx ZC702 FPGA对其进行了评估。我们的实验表明，所提出的架构在节能和执行时间方面改进了一种方式关闭方法。
Cache memories are a key component of computing systems because they minimize latency between the processor and the main memory. However, they require a large amount of the total energy consumption of the system. This energy demand depends on the application’s behavior. Thus, reconfiguring the cache to fit to every application’s memory requirements with the minimum resources would save a significant amount of energy. This paper presents an architecture that enables the reconfiguration of the cache associativity during runtime, in order to fit the cache to the executing application. The architecture combines the cache ways using a small amount of logic, maintaining the cache entire capacity. We implemented our architecture in a LEON3 processor model and evaluated it using a Xilinx ZC702 FPGA. Our experiments show that the proposed architecture improves upon a way-shutdown approach in terms of energy savings and execution time.