On-chip digital calibration for automatic input impedance boosting during biopotential measurements
On-chip digital calibration for automatic input impedance boosting during biopotential measurements
复制标题
片上数字校准可在生物电势测量期间自动提升输入阻抗
DOI：
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发表时间：
2015
期刊：
影响因子：
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通讯作者：
M. Onabajo
中科院分区：
文献类型：
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作者：
Seyed Alireza Zahrai;Li Xu;Chun;Kainan Wang;Ibrahim Farah;M. Onabajo
提出了一种用于自适应提高生物电位测量系统模拟前端输入阻抗的片上数字校准系统。校准单元控制两个8位电容器组产生负电容，并将仪表放大器的输入阻抗显着增加至500 M Ω以上。振荡检测方案保护系统不稳定。仿真结果证实，校准方案是可靠的，在存在的工艺变化。校准逻辑单元采用130nm CMOS工艺设计、布局和仿真，电源电压为1.2V。功耗为1.2 μW，芯片面积为0.062 mm2。
An On-chip digital calibration system is presented to adaptively improve the input impedance of analog front-ends in biopotential measurement systems. The calibration unit controls two 8-bit capacitor banks to generate a negative capacitance and to significantly increase the input impedance of an instrumentation amplifier to above 500MΩ. An oscillation detection scheme protects the system from instability. Simulation results endorse that the calibration scheme is reliable in the presence of process variations. The calibration logic unit was designed, laid out and simulated in 130nm CMOS technology with a 1.2V supply. It consumes 1.2 μW of power and 0.062 mm2 of chip area.