Nano scale computational architectures with Spin Wave Bus
Nano scale computational architectures with Spin Wave Bus
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DOI：
10.1016/j.spmi.2005.07.001
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发表时间：
2005-09-01
影响因子：
3.1
通讯作者：
Wang, KL
中科院分区：
文献类型：
--
作者：
Khitun, A;Wang, KL
我们提出并分析了一种新的纳米尺度计算架构，使用自旋波作为器件互连的物理机制。信息被编码成在铁磁薄膜中传播的自旋波的相位-自旋波总线。我们描述了几种可能的逻辑器件利用自旋波。所提出的设备的性能示出的数值模拟的基础上的自旋波的激发和传播的NiFe膜的实验数据。所提出的架构的主要优点是，信息传输完成没有电荷转移。潜在地，具有自旋波总线的架构可能在功耗方面是有益的，并且解决了互连问题。另一个预期的好处是增强的逻辑功能。使用相位逻辑，可以在一个器件中实现多个逻辑功能。这些优点使得具有自旋波总线的架构对于超高密度集成电路（每平方英寸超过10（10）个器件）中的应用非常有前景。(C)2005爱思唯尔有限公司保留所有权利。
We propose and analyze a new kind of nano scale computational architectures using spin waves as a physical mechanism for device interconnection. Information is encoded into the phase of spin waves propagating in a ferromagnetic film - a Spin Wave Bus. We describe several possible logic devices utilizing spin waves. The performance of the proposed devices is illustrated by numerical modeling based on the experimental data for spin wave excitation and propagation in NiFe film. The key advantage of the proposed architectures is that information transmission is accomplished without charge transfer. Potentially, the architectures with Spin Wave Bus may be beneficial in terms of power consumption and resolve the interconnect problem. Another expected benefit is in the enhanced logic functionality. Using phase logic, it is possible to realize a number of logic functions in one device. These advantages make the architectures with a Spin Wave Bus very promising for application in ultra-high-density integrated circuits (more than 10(10) devices per square inch). (C) 2005 Elsevier Ltd. All rights reserved.