PULP: A Ultra-Low Power Parallel Accelerator for Energy-Efficient and Flexible Embedded Vision
PULP: A Ultra-Low Power Parallel Accelerator for Energy-Efficient and Flexible Embedded Vision
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DOI：
10.1007/s11265-015-1070-9
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发表时间：
2016-09-01
影响因子：
1.8
通讯作者：
Benini, Luca
中科院分区：
文献类型：
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作者：
Conti, Francesco;Rossi, Davide;Benini, Luca
智能监控摄像头和自主微型无人机等新型普及设备可以极大地受益于以极低功耗支持嵌入式计算机视觉的计算设备的可用性。为此，我们提出了 PULP（并行处理超低功耗平台），这是一种基于紧密耦合的 OpenRISC ISA 内核集群构建的架构，采用先进的技术实现快速性能和能源可扩展性，利用了 STMicroelectronics UTBB FD-SOI 28nm 技术的功能。我们证明了 PULP 性能可以在 1x-354x 范围内扩展，理论峰值能效为 211 GOPS/W。我们展示了来自图像处理和视觉领域的几个要求严格的内核的性能结果，以及布局后功率建模：运动检测应用程序的运行效率高达 192 GOPS/W（理论峰值的 90%）；用于智能监控的基于 ConvNet 的探测器，可以在 0.7 和 27fps 操作模式之间切换，在 320 x240 图像上将每帧能耗调整到 1.2 到 12mJ 之间；以及 FAST + Lucas-Kanade 光流在 128 x128 图像上以每帧 14 mu J 的超低能量预算（60fps）。
Novel pervasive devices such as smart surveillance cameras and autonomous micro-UAVs could greatly benefit from the availability of a computing device supporting embedded computer vision at a very low power budget. To this end, we propose PULP (Parallel processing Ultra-Low Power platform), an architecture built on clusters of tightly-coupled OpenRISC ISA cores, with advanced techniques for fast performance and energy scalability that exploit the capabilities of the STMicroelectronics UTBB FD-SOI 28nm technology. We show that PULP performance can be scaled over a 1x-354x range, with a peak theoretical energy efficiency of 211 GOPS/W. We present performance results for several demanding kernels from the image processing and vision domain, with post-layout power modeling: a motion detection application that can run at an efficiency up to 192 GOPS/W (90 % of the theoretical peak); a ConvNet-based detector for smart surveillance that can be switched between 0.7 and 27fps operating modes, scaling energy consumption per frame between 1.2 and 12mJ on a 320 x240 image; and FAST + Lucas-Kanade optical flow on a 128 x128 image at the ultra-low energy budget of 14 mu J per frame at 60fps.