Single-Event Burnout Hardening of Power UMOSFETs With Optimized Structure
Single-Event Burnout Hardening of Power UMOSFETs With Optimized Structure
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DOI：
10.1109/ted.2013.2256426
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发表时间：
2013-05
影响因子：
3.1
通讯作者：
Ying Wang;Yue Zhang;Li-guo Wang;Chenghao Yu
中科院分区：
文献类型：
--
作者：
Ying Wang;Yue Zhang;Li-guo Wang;Chenghao Yu
本文给出并解释了功率金属氧化物半导体场效应晶体管U形金属氧化物半导体场效应晶体管（沟槽栅MOSFET）单粒子烧毁（SEB）硬化的模拟结果。它包括p+插塞扩大，并在外延层和衬底之间添加缓冲层。对这两种硬化方案进行了比较，并给出了防止SEB的优化结构。还比较了不同能量转移情况下的单粒子栅破裂（SEGR）阈值电压与SEB结果。此外，模拟结果表明，栅极偏置的变化会影响SEGR的发生，并考虑了低温下的自然辐射环境。
This paper gives and explains the simulation results of single-event burnout (SEB) hardening in a power metal-oxide semiconductor field-effect transistor U-Shape Metal Oxide Semiconductor Field Effect Transistor (trench-gate MOSFET). It includes p+ plug enlargement and adds a buffer layer that is between the epitaxial layer and substrate. These two hardening solutions are compared and the optimized structure that can prevent SEB is given. The single event gate-rupture (SEGR) threshold voltages in different linear energy transfers are also compared with SEB results. In addition, the simulation results show that the change of gate bias can influence the occurrence of SEGR, and the natural radiation environment at cryogenic temperatures is also considered.