Combining process and statistical variability in the evaluation of the effectiveness of corners in digital circuit parametric yield analysis

Combining process and statistical variability in the evaluation of the effectiveness of corners in digital circuit parametric yield analysis
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结合过程和统计变异性来评估数字电路参数良率分析中的角点有效性

DOI:
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发表时间:
2010
期刊:
2010 Proceedings of the European Solid State Device Research Conference
影响因子:
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通讯作者:
A. Asenov
A. Asenov
中科院分区:
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文献类型:
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作者:
P. Asenov;N. Kamsani;D. Reid;C. Millar;S. Roy;A. Asenov

文献摘要

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本文重点讨论了两种主要类型的MOSFET可变性-系统(过程)和统计(随机)可变性,并讨论了使用过程角作为良率和电路性能的度量。我们提供了一种执行大规模统计SPICE模拟的方法,作为评估由统计变异性主导的系统中拐角精度的一种手段,然后扩展该方法,在同一大规模SPICE模拟中包括系统和统计变异性。这种大规模的统计/系统方法与“全局+局部”统计角方法进行了比较,后者由过程角周围的统计模拟组成。最后,利用二维核密度估计从统计模拟中提取良率数据,从而进行能量/延迟/良率优化。这反过来又突出了统计角落方法的缺陷。
This paper focuses on two main types of MOSFET variability - systematic (process) and statistical (random) variability and discusses the use of process corners as a measure of yield and circuit performance. We provide a methodology for performing large-scale statistical SPICE simulations as a means of evaluating the accuracy of corners in a system dominated by statistical variability and then expand the methodology to include both systematic and statistical variability within the same large-scale SPICE simulations. This large-scale statistical/systematic approach is compared to the “global + local” statistical corner approach, which consists of statistical simulations around the process corners. Finally 2D kernel density estimates are used to extract yield data from the statistical simulations to allow energy/delay/yield optimization to be performed. This in turn highlights the deficiencies of the statistical corner approach.