CMOS Inverter Based on Gate-All-Around Silicon-Nanowire MOSFETs Fabricated Using Top-Down Approach
CMOS Inverter Based on Gate-All-Around Silicon-Nanowire MOSFETs Fabricated Using Top-Down Approach
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DOI：
10.1109/led.2007.906622
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发表时间：
2007-10
影响因子：
4.9
通讯作者：
S. C. Rustagi;N. Singh;W. Fang;K. Buddharaju;S. R. Omampuliyur;S. Teo;C. Tung;G. Lo;N. Balasubramanian;D. Kwong
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文献类型：
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作者：
S. C. Rustagi;N. Singh;W. Fang;K. Buddharaju;S. R. Omampuliyur;S. Teo;C. Tung;G. Lo;N. Balasubramanian;D. Kwong
这封信首次展示了使用自上而下的方法将门全能(GaA)硅纳米线晶体管集成到CMOS反相器中。通过匹配不同栅长的n-MOSFET和p-MOSFET的驱动电流以实现对称的上拉和下拉，获得了具有高电压增益(例如，当VDD=1.2V时，DeltaV Out/DeltaV In高达~40)的尖锐的开关转变。该逆变器在低至0.4V的宽VDD测试范围内保持了良好的传输特性和噪声容限。单个晶体管显示出出色的亚阈值特性和驱动电流。根据其他先进的非经典器件结构(如FinFET)的电路性能，对结果进行了讨论。从而展示了GaA硅纳米线晶体管实现CMOS电路功能的集成潜力。
This letter demonstrates, for the first time, the integration of gate-all-around (GAA) Si-nanowire transistors into CMOS inverters using top-down approach. With matching of the drive currents of n- and p-MOSFETs using different gate lengths to achieve symmetric pull-up and pull-down, sharp ON- OFF transitions with high voltage gains (e.g., DeltaV OUT/DeltaV IN up to ~ 40 for V DD = 1.2 V) are obtained. The inverter maintains its good transfer characteristics and noise margins for wide range of V DD tested down to 0.4 V. Individual transistors show excellent subthreshold characteristics and drive currents. The results are discussed in light of the circuit performances reported for other advanced nonclassical device architectures such as FinFETs. The integration potential of GAA Si-nanowire transistors to realize CMOS-circuit functionality is thus demonstrated.