Compact Modeling for Silicon Photonic Heterogeneously Integrated Circuits
Compact Modeling for Silicon Photonic Heterogeneously Integrated Circuits
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DOI：
10.1109/jlt.2017.2706721
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发表时间：
2017-07
影响因子：
4.7
通讯作者：
Zeyu Zhang;R. Wu;Yuyang Wang;Chong Zhang;E. Stanton;C. Schow;K. Cheng;J. Bowers
中科院分区：
文献类型：
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作者：
Zeyu Zhang;R. Wu;Yuyang Wang;Chong Zhang;E. Stanton;C. Schow;K. Cheng;J. Bowers
在异质集成硅平台上制造的光子集成电路已经显示出创纪录的集成度和通信能力。随着光子集成电路变得越来越大和越来越复杂，设计和分析它们需要成熟的电子设计自动化所采用的建模和仿真方法。本文介绍了用于制造光芯片上网络的积木的紧凑模型的发展。这些模型在与SPICE兼容的电子设计自动化工具和专用光子电路仿真器中实现。模型验证在器件和链路级别进行，使电路设计人员能够研究单个器件设计对整体链路性能的影响，为基于模型的光子集成电路设计优化铺平道路。
Photonic-integrated circuits fabricated on a heterogeneously integrated silicon platform have demonstrated record levels of integration and communication capacity. As photonic-integrated circuits become larger and more complex, designing and analyzing them demand modeling and simulation methodologies employed in matured electronic design automation. In this paper, the development of compact models for the building blocks of a fabricated optical network-on-a-chip is introduced. These models are implemented in both SPICE-compatible electronics design automation tools and dedicated photonic-circuit simulators. Model validation is conducted at both device and link levels, allowing the circuit designer to study the impact of individual device design on the overall link performance, paving the path for model-based design optimization of photonic-integrated circuits.