Microarchitectural innovations: boosting microprocessor performance beyond semiconductor technology scaling
Microarchitectural innovations: boosting microprocessor performance beyond semiconductor technology scaling
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DOI：
10.1109/5.964438
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发表时间：
2001-11
期刊：
影响因子：
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通讯作者：
Andreas Moshovos;G. Sohi
中科院分区：
文献类型：
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作者：
Andreas Moshovos;G. Sohi
半导体技术的规模化为制造微处理器提供了更快、更充足的晶体管，而应用继续推动着对更强大微处理器的需求。将“原始”半导体材料编织到微处理器中，以提供现代和未来应用所需的性能，这就是计算机体系结构的作用。本文综述了支持现代高性能微处理器的一些微体系结构技术。这些技术被分类为：1)旨在增加指令处理中的并发性的技术，同时保持顺序处理的外观；以及2)利用程序行为的技术。第一类包括流水线、超标量执行、乱序执行、寄存器重命名和重叠内存访问指令的技术。第二类包括内存层次结构、分支预测器、跟踪缓存和内存相关预测器。文中还讨论了未来微处理器中可能使用的微体系结构技术，包括数据值推测和指令重用，具有多个定序器和线程级推测的微体系结构，以及解决功耗和可靠性问题的微体系结构技术。
Semiconductor technology scaling provides faster and more plentiful transistors to build microprocessors, and applications continue to drive the demand for more powerful microprocessors. Weaving the "raw" semiconductor material into a microprocessor that offers the performance needed by modern and future applications is the role of computer architecture. This paper overviews some of the microarchitectural techniques that empower modem high-performance microprocessors. The techniques are classified into: 1) techniques meant to increase the concurrency in instruction processing, while maintaining the appearance of sequential processing and 2) techniques that exploit program behavior. The first category includes pipelining, superscalar execution, out-of-order execution, register renaming, and techniques to overlap memory-accessing instructions. The second category includes memory hierarchies, branch predictors, trace caches, and memory-dependence predictors. The paper also discusses microarchitectural techniques likely to be used in future microprocessors, including data value speculation and instruction reuse, microarchitectures with multiple sequencers and thread-level speculation, and microarchitectural techniques for tackling the problems of power consumption and reliability.