A corner stitching compliant B∗-tree representation and its applications to analog placement
A corner stitching compliant B∗-tree representation and its applications to analog placement
复制标题
符合角缝合的 B* 树表示及其在模拟布局中的应用
DOI:
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发表时间:
2011
期刊:
影响因子:
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通讯作者:
Dick Liu
中科院分区:
文献类型:
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作者:
Hui;Pang;Shih;Yao;Mark Po;Duan;Dick Liu
Modern circuit placement, especially analog placement, often needs to consider various constraints, such as symmetry, proximity, preplaced, variant, fixed-boundary, minimum separation, boundary, and fixed-outline constraints, for better electrical effects and higher performance. To handle these diverse constraints, topo-logical floorplan representations are pervasively used because of their higher flexibility and smaller solution space. Due to their intrinsic limitation in deriving module adjacency information directly from the representations themselves, however, they might incur difficulties in handling related constraints. In this paper, we work on B∗-trees, which have been shown to be most effective and efficient for floor-plan/placement problems, and present a corner stitching compliant B∗-tree (CB-tree, for short) to remedy the significant deficiency in its module adjacency handling. A CB-tree is a B∗-tree integrated with modified corner stitching to offer much higher flexibility/efficiency, especially for adjacent module identification/packing. Compared with the previous works, CB-trees can achieve the lowest time complexity for module packing with the aforementioned constraints. Experimental results show that the CB-trees achieve the best solution quality and consume the least running time for industrial designs with various constraints. In particular, our work provides key insights into the handling of comprehensive placement constraints with a topological representation.