2.5 Gb/s 557 mW STM-16 regenerator section terminating LSI chip
2.5 Gb/s 557 mW STM-16 regenerator section terminating LSI chip
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2.5 Gb/s 557 mW STM-16 再生器部分端接 LSI 芯片
DOI：
10.1109/isscc.1997.585314
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发表时间：
1997
期刊：
影响因子：
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通讯作者：
H. Ichino
中科院分区：
文献类型：
--
作者：
K. Koike;A. Onozawa;H. Obara;H. Ichino
亚瓦特STM-16再生器部分端接数字LSI，涵盖STM-16中继器的所有功能，采用先进的双极LSI技术。传统的双极电路不适合低功率工作，因为它们吸收的是恒定电流，而且V/B BE/(基极和发射极之间的导通电压)不是按比例调整的。用于间歇提供恒流的电源管理逻辑，用于降低电源电压的2.5V ECL，以及用于最小化总电流的电源优化CAD，克服了GB/S双极LSI的功耗降低困难，使功耗降低了约10倍。
The sub-Watt STM-16 regenerator-section terminating digital LSI covering all functions of an STM-16 repeater, uses advanced bipolar-LSI technology. Conventional bipolar circuits are not suitable for low-power operation, because they draw a constant current and because V/sub BE/ ("on" voltage between base and emitter) is not scaled. Power-management logic for intermittently supplying a constant current, 2.5 V ECL for supply-voltage reduction, and power-optimizing CAD for minimizing total current overcome the difficulty in reducing the power of Gb/s bipolar LSIs, and enable power reduction by a factor of about 10.