A refreshable analog VLSI neural network chip with 400 neurons and 40 k synapses
A refreshable analog VLSI neural network chip with 400 neurons and 40 k synapses
复制标题
具有 400 个神经元和 40 k 个突触的可刷新模拟 VLSI 神经网络芯片
DOI：
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发表时间：
1992
期刊：
影响因子：
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通讯作者：
H. Shinohara
中科院分区：
文献类型：
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作者：
Y. Arima;Mitsuhiro Murasaki;T. Yamada;A. Maeda;H. Shinohara
描述了具有刷新片上模拟突触权重存储的自学习神经网络芯片。该芯片采用0.8μm双多晶硅双金属CMOS工艺，集成了400个神经元和40000个突触。刷新时间小于300μs。芯片通过以 100 毫秒的间隔重复刷新来保留学习到的信息。所提出的刷新方法基于子网做出的决策。子网络了解是否应该记住主网络的稳定状态，保留权重直到重新学习为止，并将子网络权重的 4-b 表示存储在计数器中。主网络根据子网络的输出进行刷新。<<ETX>>
Describes a self-learning neural network chip with refresh on-chip analog synaptic weight storage. The chip integrates 400 neurons and 40000 synapses with 0.8- mu m double poly-Si double metal CMOS technology. Refresh time is less than 300 mu s. The chip retains learned information by repeating refresh at 100 ms intervals. The proposed refresh method is based on the decision made by a subnetwork. The subnetwork learns if the settling states of the main network should be memorized, retains the weights until they are relearned, and stores a 4-b representation of subnetwork weights in a counter. The main network is refreshed according to the output of the subnetwork.<<ETX>>