A D-Band Passive Imager in 65 nm CMOS
A D-Band Passive Imager in 65 nm CMOS
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DOI：
10.1109/lmwc.2012.2192720
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发表时间：
2012-04
影响因子：
3
通讯作者：
Q. Gu;Zhiwei Xu;A. Tang;Mau-Chung Frank Chang
中科院分区：
文献类型：
--
作者：
Q. Gu;Zhiwei Xu;A. Tang;Mau-Chung Frank Chang
A differential D-band (140 GHz) passive imager has been demonstrated in a 65 nm CMOS technology. It achieves a minimum noise equivalent power of 26 fW/√Hz with peak responsivity of 1.2 MV/W. The core circuit consumes chip area of 950×240 μm2 with dc power consumption of 152 mW. This work further pushes imagers in CMOS technology working towards higher millimeter wave/sub millimeter wave frequencies.
