Variability-driven module selection with joint design time optimization and post-silicon tuning

Variability-driven module selection with joint design time optimization and post-silicon tuning
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通过联合设计时间优化和投片后调整来进行可变性驱动的模块选择

DOI:
10.1109/aspdac.2008.4483963
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发表时间:
2008
期刊:
2008 Asia and South Pacific Design Automation Conference
影响因子:
--
通讯作者:
Yuan Xie
Yuan Xie
中科院分区:
--
文献类型:
--
作者:
Feng Wang;Xiaoxia Wu;Yuan Xie

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随着技术向深亚微米(DSM)方向发展,延迟和功率变化的增加对设计人员来说是一个重大挑战。高级综合中的传统模块选择技术使用最坏情况的延迟/功率信息来执行优化,因此可能过于悲观,使得使用额外的资源来保证设计要求。参数成品率定义为综合硬件满足性能/功耗约束的概率,可用于指导设计空间探索。通过结合设计时的变化感知优化和硅后调谐技术(如自适应体偏置(ABB)),可以有效地提高参数成品率。在本文中,我们提出了一种模块选择算法,结合设计时优化与硅后调整(使用ABB),以最大限度地提高设计产量。提出了一种基于有效性能和功率收益梯度计算的可变感知模块选择算法。后硅优化制定为一个有效的顺序圆锥规划,以确定最佳的体偏置分布,这反过来又影响设计时的模块选择。实验结果表明,与传统的最坏情况驱动的模块选择技术相比,该方法可以获得显著的成品率。据我们所知,这是第一个可变性驱动的高层次的综合技术,考虑后硅调整在设计时优化。
Increasing delay and power variation are significant challenges to the designers as technology scales to the deep sub-micron (DSM) regime. Traditional module selection techniques in high level synthesis use worst case delay/power information to perform the optimization, and therefore may be too pessimistic such that extra resources are used to guarantee design requirements. Parametric yield, which is defined as the probability of the synthesized hardware meeting the performance/power constraints, can be used to guide design space exploration. The parametric yield can be effectively improved by combining both design-time variation-aware optimization and post silicon tuning techniques (such as adaptive body biasing (ABB)). In this paper, we propose a module selection algorithm that combines design-time optimization with post- silicon tuning (using ABB) to maximize design yield. A variation-aware module selection algorithm based on efficient performance and power yield gradient computation is developed. The post silicon optimization is formulated as an efficient sequential conic program to determine the optimal body bias distribution, which in turn affects design-time module selection. The experiment results show that significant yield can be achieved compared to traditional worst-case driven module selection technique. To the best of our knowledge, this is the first variability-driven high level synthesis technique that considers post-silicon tuning during design time optimization.
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DOI: --
发表时间: 2008
期刊: 社会保険旬報 2008年11月1日号
影响因子: --
作者:
姫野順一;北川勝彦;高橋泰
通讯作者: 高橋泰