JFET Depletion in SuperJunction Devices

JFET Depletion in SuperJunction Devices
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DOI:
10.1109/ispsd.2008.4538922
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发表时间:
2008-05
期刊:
2008 20th International Symposium on Power Semiconductor Devices and IC's
影响因子:
--
通讯作者:
D. Disney;G. Dolny
D. Disney;G. Dolny
中科院分区:
其他
文献类型:
--
作者:
D. Disney;G. Dolny

文献摘要

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超结理论预测,随着漂移区中N-型区和P型区宽度的减小,比导通电阻也会提高。文中指出,由于导电区的JFET耗尽,通过缩小这些宽度来改善导通电阻是有实际限度的。建立了计算超结器件最佳漂移区宽度的解析模型,并进行了模拟验证。给出了不同漂移区电荷水平和外加漏极电压的超导器件最佳漂移区宽度的具体例子。
SuperJunction theory predicts that specific on- resistance improves as the widths of the N- and P-type regions in the drift region are reduced. In this paper, it is shown that there is a practical limit to improving on-resistance by shrinking these widths, due to JFET depletion of the conducting regions. An analytic model is developed to calculate the optimum drift region width for super junction devices, and this model is verified by simulations. Specific examples of optimized drift region widths for superjunction devices with various levels of drift region charge and applied drain voltage are provided.