A Study of an Infrastructure for Research and Development of Many-Core Processors
A Study of an Infrastructure for Research and Development of Many-Core Processors
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众核处理器研发基础设施的研究
DOI：
10.1109/pdcat.2009.77
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发表时间：
2009
期刊：
影响因子：
--
通讯作者：
Kenji Kise
中科院分区：
文献类型：
--
作者：
Koh Uehara;Shimpei Sato;T. Miyoshi;Kenji Kise
在一个芯片上具有数千个核的众核处理器将得以实现。我们开发了一种基础设施，可以加速这种众核处理器的研究和开发。本文介绍了我们的基础设施提供的三个主要要素。第一个元素是简单的众核处理器架构的定义，称为M-Core。第二个是M-Core的软件模拟器SimMc。第三个是软件库MClib，它帮助开发M-Core的应用程序。使用一些基准程序评估SimMc的模拟速度和M-Core的并行化效率。我们表明，我们的基础设施加速了众核处理器的研究和开发。
Many-core processors which have thousands of cores on a chip will be realized. We developed an infrastructure which accelerates the research and development of such many-core processors. This paper describes three main elements provided by our infrastructure. The first element is the definition of simple many-core processor architecture called M-Core. The second is SimMc, a software simulator of M-Core. The third is the software library MClib which helps the development of application programs for M-Core. The simulation speed of SimMc and the parallelization efficiency of M-Core are evaluated using some benchmark programs. We show that our infrastructure accelerates the research and development of many-core processors.