Experimental analysis of planar edge terminations for high voltage 4H-SiC devices
Experimental analysis of planar edge terminations for high voltage 4H-SiC devices
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DOI：
10.1109/essderc.2015.7324715
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发表时间：
2015-11
期刊：
影响因子：
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通讯作者：
V. Soler;M. Berthou;A. Mihaila;J. Montserrat;P. Godignon;J. Rebollo;J. Millán
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文献类型：
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作者：
V. Soler;M. Berthou;A. Mihaila;J. Montserrat;P. Godignon;J. Rebollo;J. Millán
本文分析了几种与平面MOSFET制造工艺兼容的高压4H-SiC器件边缘端接结构。对采用全MOSFET工艺制造的击穿电压范围为2-5kV的PiN二极管进行了边端效率分析。已经实现了由jte和fgr组成的不同边缘终止，以及jte和fgr的组合。实验结果表明，所实现的边缘终止具有良好的效率。结果表明，fgr是一种有效的高电压器件成本解决方案。此外，结合JTE和fgr的边缘终端对JTE剂量有更好的容忍度，可以最大限度地提高击穿电压，并且相同的边缘终端设计可以为2和5kV PiN二极管获得良好的效率。
Several edge termination structures for high voltage 4H-SiC devices compatible with a planar MOSFET fabrication process are analyzed in this paper. The edge terminations' efficiency has been analyzed on PiN diodes with breakdown voltage capabilities ranging from 2-5kV fabricated with full MOSFET process. Different edge terminations consisting in JTEs and FGRs, and a combination of JTEs and FGRs have been implemented. Experimental results show a good efficiency of the implemented edge terminations. It is shown that FGRs could be an effective cost solution for high voltage devices. Moreover, the edge termination combining JTE and FGRs shows a better tolerance of the JTE dose for maximizing the breakdown voltage, and the same edge termination design allows obtaining a good efficiency for both 2 and 5kV PiN diodes.