Hardware Technology of the SX-9 ( 1 )-Main System -

Hardware Technology of the SX-9 ( 1 )-Main System -
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SX-9的硬件技术（一）-主系统-

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通讯作者：
Sawamura Akihiro
Sawamura Akihiro
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作者：
Nakazato Satoshi;Tagaya Satoru;Nakagomi Norihito;Watai Takayuki;Sawamura Akihiro

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SX-9的CPU采用8组矢量流水线，单台可实现100GFLOPS以上的高性能。最大1T字节容量的内存最多可由16个CPU共享，CPU与MMU之间的数据传输最大为4T字节/秒，I/O单元与MMU之间的数据传输最大为64G字节/秒。×2。本文介绍了具有如此高性能的SX-9系统的CPU、存储器和I/O处理单元。
The CPU of the SX-9 uses 8 sets of vector pipelines to achieve a high performance over 100GFLOPS with a single unit. The memory with a maximum 1T-byte capacity can be shared by up to 16 CPUs, the data transfer between the CPU and MMU has a maximum of 4T bytes/sec and that between the I/O unit and the MMU has a maximum of 64G bytes/sec. × 2. This paper describes the CPU, memory and I/O processing unit of the SX-9 system featuring such high performances.