Close-Space Sublimation-Deposited Ultra-Thin CdSeTe/CdTe Solar Cells for Enhanced Short-Circuit Current Density and Photoluminescence.

Close-Space Sublimation-Deposited Ultra-Thin CdSeTe/CdTe Solar Cells for Enhanced Short-Circuit Current Density and Photoluminescence.
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用于增强短路电流密度和光致发光的近空间升华沉积超薄 CdSeTe/CdTe 太阳能电池。

DOI:
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发表时间:
2020
期刊:
Journal of Visualized Experiments
影响因子:
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通讯作者:
J. Sites
J. Sites
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文献类型:
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作者:
Alexandra M. Bothwell;J. Drayton;Pascal M. Jundt;J. Sites

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在全球能源需求和气候变化不断增长的情况下,光伏器件架构的发展对于使太阳能成为具有成本效益且可靠的可再生能源是必要的。薄膜CdTe技术已经证明了成本竞争力和提高效率,部分原因是快速的制造时间,最小的材料使用量,以及将CdSeTe合金引入到~3 μm的吸收层中。本工作介绍了使用自动在线真空沉积系统的薄的1.5 μm CdSeTe/CdTe双层器件的近空间升华制造。薄双层结构和制造技术使沉积时间最小化,提高器件效率,并促进未来基于薄衬底的器件架构的开发。三个制造参数似乎是最有效的优化薄CdSeTe/CdTe吸收剂设备:基板预热温度,CdSeTe:CdTe厚度比,和CdCl 2钝化。为了使CdSeTe适当升华,沉积之前的衬底温度必须为约540 °C(高于CdTe的温度),这由预热源中的停留时间控制。在CdSeTe:CdTe厚度比的变化揭示了强烈的依赖于此比率的设备性能。最佳吸收体厚度为0.5 μ mCdSeTe/1.0 μ mCdTe,非最佳厚度比会通过背势垒效应降低效率。薄吸收体对CdCl 2钝化变化敏感;在温度和时间方面,CdCl 2处理(与较厚的吸收体相比)的积极性要低得多,从而获得最佳的器件性能。通过优化制备条件,CdSeTe/CdTe比单一吸收体CdTe提高了器件的短路电流密度和光致发光强度。此外,在线近空间升华真空沉积系统提供了未来超薄吸收体架构的材料和时间减少、可扩展性和可实现性。
Developments in photovoltaic device architectures are necessary to make solar energy a cost-effective and reliable source of renewable energy amidst growing global energy demands and climate change. Thin film CdTe technology has demonstrated cost-competitiveness and increasing efficiencies due partially to rapid fabrication times, minimal material usage, and introduction of a CdSeTe alloy into a ~3 μm absorber layer. This work presents the close-space sublimation fabrication of thin, 1.5 µm CdSeTe/CdTe bilayer devices using an automated in-line vacuum deposition system. The thin bilayer structure and fabrication technique minimize deposition time, increase device efficiency, and facilitate future thin absorber-based device architecture development. Three fabrication parameters appear to be the most impactful for optimizing thin CdSeTe/CdTe absorber devices: substrate preheat temperature, CdSeTe:CdTe thickness ratio, and CdCl2 passivation. For proper sublimation of the CdSeTe, the substrate temperature prior to deposition must be ~540 °C (higher than that for CdTe) as controlled by dwell time in a preheat source. Variation in the CdSeTe:CdTe thickness ratio reveals a strong dependence of device performance on this ratio. The optimal absorber thicknesses are 0.5 μm CdSeTe/1.0 μm CdTe, and non-optimized thickness ratios reduce efficiency through back-barrier effects. Thin absorbers are sensitive to CdCl2 passivation variation; a much less aggressive CdCl2 treatment (compared to thicker absorbers) regarding both temperature and time yields optimal device performance. With optimized fabrication conditions, CdSeTe/CdTe increases device short-circuit current density and photoluminescence intensity compared to single-absorber CdTe. Additionally, an in-line close-space sublimation vacuum deposition system offers material and time reduction, scalability, and attainability of future ultra-thin absorber architectures.