Postsilicon Tuning of Standby Supply Voltage in SRAMs to Reduce Yield Losses Due to Parametric Data-Retention Failures
Postsilicon Tuning of Standby Supply Voltage in SRAMs to Reduce Yield Losses Due to Parametric Data-Retention Failures
复制标题
SRAM 中的备用电源电压的硅后调整可减少由于参数数据保留故障造成的良率损失
DOI：
10.1109/tvlsi.2010.2093938
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发表时间：
2012
影响因子：
2.8
通讯作者：
Y. Savaria
中科院分区：
文献类型：
--
作者：
A. Nourivand;A. Al;Y. Savaria
降低静态随机存取存储器（SRAM）待机模式下的电源电压是降低其泄漏功耗的有效技术。为了最大限度地减少泄漏，需要尽可能地降低电源电压。SRAM单元可以将其数据保持到特定电压，称为数据保持电压（DRV）。由于工艺参数的管芯内变化，单元的DRV在单个存储器管芯内不同。因此，存储器裸片的最小可应用待机电压（VDDLmin）由其组成单元当中的最大DRV确定。另一方面，裸片间变化导致VDDLmin的裸片到裸片变化。向所有管芯施加相同的待机电压，而不管其对应的VDDLmin如何，可能导致一些管芯由于数据保持故障（DRF）而发生故障，从而导致良率损失。在这项工作中，我们首先表明，产量损失可以显着，如果SRAM的待机电压降低积极。然后，我们提出了一种硅后待机电压调谐方案，以避免由于DRF的成品率损失，同时有效地减少漏电流。在45 nm预测工艺下的仿真结果表明，调整SRAM的待机电压可以提高10%-50%的数据保持率。
Lowering the supply voltage of static random access memories (SRAMs) during standby modes is an effective technique to reduce their leakage power consumption. To maximize leakage reductions, it is desirable to reduce the supply voltage as much as possible. SRAM cells can retain their data down to a certain voltage, called the data-retention voltage (DRV). Due to intra-die variations in process parameters, the DRV of cells differ within a single memory die. Hence, the minimum applicable standby voltage to a memory die (VDDLmin) is determined by the maximum DRV among its constituent cells. On the other hand, inter-die variations result in a die-to-die variation of VDDLmin. Applying an identical standby voltage to all dies, regardless of their corresponding VDDLmin, can result in the failure of some dies, due to data-retention failures (DRFs), entailing yield losses. In this work, we first show that the yield losses can be significant if the standby voltage of SRAMs is reduced aggressively. Then, we propose a postsilicon standby voltage tuning scheme to avoid the yield losses due to DRFs, while reducing the leakage currents effectively. Simulation results in a 45-nm predictive technology show that tuning standby voltage of SRAMs can enhance data-retention yield by 10%-50%.