Low Overhead System-Level Obfuscation through Hardware Resource Sharing

Low Overhead System-Level Obfuscation through Hardware Resource Sharing
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DOI:
10.1109/isqed57927.2023.10129342
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发表时间:
2023-04
期刊:
2023 24th International Symposium on Quality Electronic Design (ISQED)
影响因子:
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通讯作者:
Daniel Xing;Michael Zuzak;Ankur Srivastava
Daniel Xing;Michael Zuzak;Ankur Srivastava
中科院分区:
其他
文献类型:
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作者:
Daniel Xing;Michael Zuzak;Ankur Srivastava

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已经提出了逻辑锁定技术来保护芯片设计免受恶意逆向工程和生产过剩的影响。剥离功能逻辑锁定(SFLL)作为当前最先进的方法已经获得了很大的吸引力,对各种各样的攻击表现出很强的弹性。然而,基于SFLL的锁定的安全实例往往具有高功率和面积开销,特别是在其还原单元中。这项工作提出了一种新的体系结构的方法来恢复单元配置SFLL样的逻辑锁定方法,将恢复单元作为一个开销受限的共享资源。我们描述了如何通过共享恢复单元造成的资源争用从图论的角度对底层锁定方案施加约束,并提出了一个0-1 ILP和一个启发式聚类算法,用于找到满足这些约束的资源受限共享锁定配置。我们评估我们的共享方法SFLL-flex,发现我们的ILP和启发式方法分别能够实现55%和31%的功率减少所使用的锁定数据路径合成MediaBench基准,同时保持相同的安全性和功能相比,数据路径锁定与传统的门级技术。
Logic locking techniques have been proposed to protect chip designs from malicious reverse engineering and overproduction. Stripped functionality logic locking (SFLL) has gained substantial traction as a current state of the art method, exhibiting strong resilience against a wide variety of attacks. However, secure instances of SFLL-based locking tend to have high power and area overheads, particularly in its restore units. This work presents a novel architectural approach to restore unit configuration for SFLL-like logic locking methods that treats restore units as an overhead-constrained shareable resource. We describe how resource contention caused by sharing of restore units imposes constraints on the underlying locking scheme from a graph theoretic perspective and propose both a 0-1 ILP and a heuristic clustering algorithm for finding resource-constrained shared locking configurations that satisfy these constraints. We evaluate our sharing method on SFLL-flex and find that our ILP and heuristic methods were each able to achieve a 55% and 31% reduction in power used by locked datapaths synthesized from MediaBench benchmarks while maintaining the same security and functionality compared to datapaths locked with conventional gate-level techniques.