A Survey of High Level Synthesis Languages, Tools, and Compilers for Reconfigurable High Performance Computing
A Survey of High Level Synthesis Languages, Tools, and Compilers for Reconfigurable High Performance Computing
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可重构高性能计算的高级综合语言、工具和编译器综述
DOI：
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发表时间：
2013
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通讯作者：
H. Selvaraj
中科院分区：
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作者：
Luka Daoud;Dawid Zydek;H. Selvaraj
高级语言（hls）使编程更容易、更高效；因此，可以很容易地编写、修改和调试功能强大的应用程序。如今，应用程序可以分为并行任务，并在不同的处理元件上运行，如cpu、gpu或fpga；为了实现更高的性能。然而，就fpga而言，从高级表示自动生成硬件模块是近年来的主要研究活动之一。目前的研究重点是设计允许并行应用程序在不同平台上运行的编程平台，包括FPGA。本文概述了用于将高级表示转换为硬件描述语言的hls、工具和编译器。并对这些工具和编译器进行了技术分析。
High Level Languages (HLLs) make programming easier and more efficient; therefore, powerful applications can be written, modified, and debugged easily. Nowadays, applications can be divided into parallel tasks and run on different processing elements, such as CPUs, GPUs, or FPGAs; for achieving higher performance. However, in the case of FPGAs, generating hardware modules automatically from high level representation is one of the major research activities in the last few years. Current research focuses on designing programming platforms that allow parallel applications to be run on different platforms, including FPGA. In this paper, a survey of HLLs, tools, and compilers used for translating high level representation to hardware description language is presented. Technical analysis of such tools and compilers is discussed as well.