Presidential Young Investigator Award: Parallel Logic Programming Architectures

该项目涉及一种新的并行逻辑程序设计系统的开发和分析。该系统基于潘多拉语言的扁平变体，将流通信与回溯不确定性结合在一起。精简的指令集体系结构和存储模型是主要关注的问题，以便有效地实现回溯和内存管理。此外，还将探索使用图形工具调度隐式并行性的方法。这种全新的方法是基于用图形执行摘要反编译程序员的交互的。跟踪驱动图的目标是仅总结与性能相关的程序执行特征：粒度和依赖项。这种抽象对于总结大型程序是必要的。程序员对鼠标生成的图形的注释可以被概括为源程序中的显式杂注。在其他调度器(例如，按需调度器或显式调度器)之上使用该方法来微调应用程序性能。基准性能的实证分析是整个设计过程中的一个关键因素。

This project involves the development and analysis of a new parallel logic programming system. The system is based on a flat variation of the Pandora language, incorporating both stream communication with backtracking nondeterminism. A reduced instruction-set architecture and storage model for efficient implementations of backtracking and memory management are major concerns. In addition, methods of scheduling implicit parallelism with graphical tools will be explored. The radically new approach is based on decompiling the programmer's interaction with a graphical execution summary. The goal of the trace-driven graph is to summarize only the program execution characteristics relevant to performance: granularity and dependencies. This abstraction is necessary to summarize large programs. Programmer annotations of the graph made by mouse can be generalized to explicit pragma within the source program. This approach is used on top of other schedulers (e.g., on-demand schedulers or explicit schedulers) for fine tuning applications performance. Empirical analysis of benchmark performance is a critical factor throughout the design process.