Next-Generation Load-Value Predictors

目前的高端微处理器采用了各种预测器来提高性能。未来的cpu可能会包括更多的预测器，特别是负载值预测器。负载值预测器为需要负载结果的指令提供预测值，从而允许这些指令继续执行，而无需等待负载的缓慢内存访问完成。因此，减少了程序的执行时间。最近对负荷值预测的研究提出了复杂的混合预测器和置信度估计器。虽然这些预测器非常有效，但它们的复杂性和尺寸会对关键路径长度、周期时间、芯片面积、功耗和散热等性能参数产生负面影响。本研究的目标是在不降低性能的情况下减小值预测器的大小，提高预测精度和覆盖率，开发新的预测器和置信度估计器。系统的搜索将发现新的预测器，利用额外的价值局部性，并将确定更好的置信度估计，减少代价高昂的错误预测。此外，还将研究修复畸形预测和抑制错误预测的技术。最后，研究了提高预测器利用率的方案和提高预测器访问速度的方法。虽然所提出的想法在今天的系统中已经是有益的，但随着越来越多的CPU周期由于负载延迟而被浪费，它们将变得更加重要。

Current high-end microprocessors incorporate a variety of predictors to improve performance. Future CPUs will likely include even more predictors, in particular load-value predictors. Load-value predictors provide predicted values to instructions that need the result of a load, thereby allowing these instructions to proceed without waiting for the load's slow memory access to complete. Thus, the program execution time is reduced.Recent work on load-value prediction proposes sophisticated hybrid predictors with confidence estimators. While these predictors are quite effective, their complexity and size negatively affect performance parameters such as critical-path length, cycle time, chip area, power consumption, and heat dissipation.The goal of this research is to reduce the size of value predictors without decreasing performance, to improve the prediction accuracy and coverage, and to develop new predictors and confidence estimators. A systematic search will find novel predictors that exploit additional value locality and will identify better confidence estimators that reduce costly mispredictions. Moreover, techniques that repair malformed predictions and inhibit wrong predictions will be investigated. Finally, schemes to enhance the predictor utilization and approaches to speed up predictor accesses will be researched. While the proposed ideas are already beneficial in today's systems, they will become even more important as increasing numbers of CPU cycles are wasted due to growing load latencies.