CAREER: Designing with Light: Comparative Analysis and Design of Optical Interconnects for Chip-to-Chip Communication

提案编号：0347649机构：康奈尔大学捐赠的主要研究者：阿普塞尔，Alyssa标题：设计与光：比较分析和设计的光互连芯片到芯片通信摘要：CMOS电子产品已成为无处不在的现代社会，继续创造技术和经济机会，如便携式计算和手持设备等领域。 过去，CMOS处理器的能力受到晶体管密度、功耗和速度的内部限制。所有这些特性都随着晶体管缩放而一致地改善，经验上由摩尔定律支配。然而，随着CMOS特征尺寸减小到亚微米范围，电信号和互连问题有望成为板级和芯片级高性能系统的最终限制。将光互连技术集成到高性能计算系统中，为解决芯片间通信瓶颈提供了一种有前途的必要途径，本项目的目标是为短距离芯片间光互连设计提供一个框架，以解决这些微电子系统的独特问题和要求。通过对芯片到芯片光互连设计领域的研究，我发现现有的大规模网络中的光互连模型在应用于小芯片规模网络时会失败。 通过执行针对较小芯片规模的分析，并将这些新方法与可用的建模工具相结合，我们将使光学互连被添加到主流CMOS设计人员的设计目录中。 为了实现这一目标，我们提出了一个双管齐下的研究计划，包括调查和开发可行的高速互连。 所提出的研究的第一部分的目标是通过执行各种互连架构的比较分析和测试来开发互连优化的方法，因为它们将被应用于多芯片模块（MCM）。 在本项目的第二部分中，我们将开发短距离光互连的CAD支持模型的框架，用于光互连的标准CMOS单元库，以及一组适用于优化短距离互连设计的简单设计规则。 这项工作的结果是使用混合技术来解决CMOS系统中的缩放问题，以及在计算CMOS architecture.The教育方面的重点是在高中，本科和研究生水平的教学和其他教育活动的研究进行这种类型的设计演示物理手段有了更好的理解。消除学生和未来设计师创新障碍的关键一步是教育他们动手进行跨学科研究，并允许他们开发和测试新颖的设计方法。根据这一想法，这项工作的第三个目标是通过为学生提供“动手”设计经验和接触发展批判性思维和实验室技能的研究来吸引各级学生。该项目为VLSI设计的学生提供了许多机会，在实验室和课堂环境中练习动手学习和培养批判性思维技能。

PROPOSAL NO: 0347649INSTITUTION: Cornell University-EndowedPRINCIPAL INVESTIGATOR: Apsel, AlyssaTITLE: Designing with Light: Comparative Analysis and Design of Optical Interconnects for Chip-to-Chip CommunicationAbstract:CMOS electronics have become ubiquitous in modern society, continuing to create both technological and economic opportunities in such areas as portable computing and handheld devices. In the past, the capabilities of CMOS processors have been limited internally by transistor density, power consumption, and speed. All of these characteristics have improved consistently with transistor scaling, governed empirically by Moore's Law. However, as CMOS feature sizes decrease into the sub-micron regime, electrical signaling and interconnect problems promise to become the ultimate limit of high performance systems at both the board and chip levels. Integration of optical interconnects into high-performance computing offers a promising and necessary approach to solving the inter-chip communication bottleneck.The goal of this project is to provide a framework for design of short distance chip-to-chip optical interconnects that addresses the unique problems and requirements of these microelectronic systems. Through research in the field of chip-to-chip optical interconnect design, I have found that existing models for optical interconnects in large scale networks fail when applied to small chip-scale networks. By performing analysis tailored to smaller chip scales and integrating these new approaches with usable modeling tools, we will enable optical interconnects to be added into the design catalog of mainstream CMOS designers. In order to achieve this we propose a two-pronged research plan composed of both investigation and development of feasible high speed interconnects. A goal of the first part of the proposed research is to develop a methodology for interconnect optimization by performing a comparative analysis and testing of various interconnect architectures, as they would be applied in a multi-chip module (MCM). In the second segment of this project, we will develop the framework for CAD supportable models of short distance optical interconnects, standard CMOS cell libraries for optical interconnect, and a set of simple design rules applicable to optimized short distance interconnect design. The results of this work with be both a better understanding of use of hybrid technologies to solve scaling problems in CMOS systems as well as a demonstrated physical means of carrying out this type of design within a computational CMOS architecture.The educational aspect of this project focuses on integrating research into teaching and other educational activities at the high school, undergraduate, and graduate levels. A crucial step in removing barriers to innovation by students and future designers is to educate them in hands-on interdisciplinary research and allow them to develop and test novel design methodologies. In following with this idea, a third goal of this work is to engage students at all levels by providing them with "hands on" design experiences and exposure to research that develops both critical thinking and laboratory skills. This project provides many opportunities for students of VLSI design to practice hands on learning and develop critical thinking skills both in the laboratory and in the classroom environments.