SBIR Phase I: EI/ES6: Low Power Consumption Digital IC Systems

该小型企业创新计划（SBIR）第一阶段项目将一项技术商业化，该技术将数字电子产品的能耗平均降低了三倍。该解决方案适用于整个半导体市场。从设计多同步数字电子学的角度出发，推导了其功率优势。基于一种称为相对时序的新方法，提出了下一代多同步系统的设计流程。相对时序使得标准单时钟频率电子设计自动化（EDA）工具和流程的应用能够无缝地应用于单个数字集成电路中的多个时序域的设计。不需要修改标准单元库。需要一些额外的EDA来支持由额外的多同步电路知识产权（IP）原语提供的扩展并发性和同步。与单频设计相比，这些IP模块可实现更低的功耗、更小的面积和更高的性能。这些多同步系统中的时序约束是基于形式验证的，因此被证明是正确和完整的。由于设计模块化，提高了系统设计的生产力。该项目通过开发一种产品就绪的半导体设计来验证该方法，该设计与传统的单频设计相比，在功耗、面积和性能方面具有显著的竞争优势。该项目更广泛的影响/商业潜力解决了数字电子产品中降低能耗的需求，并植根于集成电路晶体管的指数增长。在此之前，随着设计变得功率受限，引入了新的晶体管技术。每个逻辑系列都提供了更低的功耗和更好的性能。没有新的晶体管技术即将出现，这使得设计对能源效率的贡献至关重要。多同步设计的局部效率是提供显著能量降低的极少数设计方法之一。成功的商业化将使这项技术应用于整个半导体行业，从高性能云计算服务器到医疗电子和传感器。整个行业的增长将通过EDA和定制电路IP产品来实现，这些产品支持多同步架构的开发。与世界一流的半导体公司建立开放的市场和战略合作伙伴关系，以进行培训、咨询和早期产品开发，这将降低早期风险并提高市场认可度。超低功耗医疗应用，如数字助听器设备，特别受益于多同步技术。电池寿命的延长降低了产品成本，提高了老年人和残疾人的生活质量。同样，超低功耗生物医学无线传感器也提供了社会效益。

This Small Business Innovation Program (SBIR) Phase I project commercializes a technology that reduces the energy consumption in digital electronics on average by a factor of three. The solution applies across the complete semiconductor marketplace. The power advantages are derived based on designing multi-synchronous digital electronics. A next generation design flow is developed for multi-synchronous systems based on a novel method called relative timing. Relative timing enables the application of the standard single clock frequency Electronic Design Automation (EDA) tools and flows to be seamlessly applied to the design of multiple timing domains in a single digital integrated circuit. No modifications to the standard cell libraries are required. Some additional EDA is necessary to support the extended concurrency and synchronization provided by additional multi-synchronous circuit Intellectual Property (IP) primitives. These IP blocks enable lower power, reduced area, and higher performance than single frequency designs. Timing constraints in these multi-synchronous systems are based on formal verification and therefore are proven correct and complete. System design productivity is enhanced due to design modularity. This project validates the method by developing a product-ready semiconductor design that demonstrates a significant competitive advantage in power, area, and performance against a traditional single frequency design. The broader impact/commercial potential of this project addresses the need for reduced energy consumption in digital electronics and is rooted in the exponential growth in transistors on integrated circuits. Previously, as designs became power limited, new transistor technologies were introduced. Each logic family provided lower power and better performance. No new transistor technology is on the horizon, making design contributions to energy efficiency critical. The localized efficiency of multi-synchronous design is one of very few design methods that provide significant energy reduction. Successful commercialization will result in this technology being applied across the semiconductor industry to products ranging from performance cloud compute servers to medical electronics and sensors. Industry wide growth will occur through EDA and custom circuit IP products that enable the development of multi-synchronous architectures. Open market and strategic partnerships with world class semiconductor companies for training, consulting, and early product development will reduce early risk and develop market acceptance. Ultra-low power medical applications such as digital hearing aid devices particularly benefit from multi-synchronous technology. Increased battery life reduces product cost and improves the quality of life for seniors and the disabled. Similarly, ultra-low power biomedical wireless sensors likewise provide societal benefit.