Processor Architecture with Program Protection Feature Using Cryptography

1.提出了一种新型的安全处理器，它具有以下特点：1）只对程序加密，不对数据加密; 2）解密密钥的选择基于虚拟存储系统，而不是通常的基于进程，即每个页面都可以与密钥相关联，以便加密共享库;安全处理器的可行性研究我们从RTL级设计的角度对DES和AES密码体制进行了评估，从硬件数量和解密时间的角度来看，两种体制并没有太大的区别。基于AES的上级安全性，本文设计了一个基于类ARM嵌入式处理器的安全处理器的RTL模型和软件仿真器，以评估硬件的增加和性能的下降。通过评估，我们可以得出结论，这个建议的缺点是可以接受的。我们的安全处理器的渗透测试由于我们的安全处理器不对数据进行加密，我们担心通过观察每个指令的结果来识别指令。我们假设三个条件：1）对手可以使用特权功能。2)通过解析高速缓存线的大小，可以探测内存总线，获取内存访问地址和数据。3)攻击者可以通过外部中断等方式执行单个目标指令，并且我们发现可以通过不同的寄存器值集合，通过几次到几十次的执行来逐个识别指令。为了保护程序，我们必须考虑一些条件将受到限制。

1. Proposal of a secure processorWe have proposed a new type of secure processor which has these features:1)encrypt only on program, not on data, 2)decryption key is selected based on virtual memory system not on process basis as usual, i.e. each page can be related to key in order to encrypt shared libraries;2. Feasibility study on proposed secure processorWe evaluated DES and AES cryptosystem by designing by RTL level, and the point of hardware amount and decryption time, both systems are not so different. So, we employ AES, because of its superior security.We designed a RTL model and software simulator of proposed secure processor based on ARM-like embedded processor to evaluate the increase of hardware and the degradation of performance. By this evaluation, we can conclude the demerits of this proposal are acceptable.3. Penetration test for our secure processorAs our secure processor does not encrypt on data, we afraid the instructions are identified by observing the results of each instruction result with many input data. We assume three conditions: 1) adversary can use privileged function. 2) Adversary can probe memory bus and get memory access address and data by resolution of cache line size. 3)adversary can execute single target instruction using external interrupt or something; and we find the instruction can be identified one by one by several to several tens executions with deferent sets of register values. To protect program, we must consider some conditions will be restricted.