Study on IP Implementation of a Dependable Controller using NLG

研究目的是：(1)神经逻辑门（简称NLG）的电路简化和IP实现，它使用Hopfield神经网络中的输入-输出召回函数，(2)使用NLG IP评估三相直流电机控制的可靠性，(3)开发的NLG IP的自由分布。我们已经完成了NLG的电路简化和部分NLG IP实现。然而，由于实时使用中的IP时序错误，我们无法评估所提出的可靠控制器，并且无法在2013年4月之前得出最终的NLG IP。

he study purposes are (1) circuit simplification and IPimplementation of Neural Logic Gate, abbreviated as NLG, which uses the input-outputrecall function in a Hopfield ANN, (2) evaluation of the dependability in 3-phase DC motorcontrol using the NLG IP, (3) distribution of the developed NLG IP as free. We havesucceeded in the circuit simplification of NLG and a part of NLG IP implementation.Because of the IP timing bug in real-time usage, however, we could not evaluate theproposed dependable-controller, and not deriver the final NLG IP by Apr. 2013.