Simulation and Performance Optimization of Large-Scale Systems in the Presence of Uncertainties

全球电子行业的快速发展正在不断推出以更高频率和比特率运行的新产品。在如此高的数据速率下，高频效应成为限制微电子系统整体性能的主要因素。此外，对多功能和小型化产品的快速增长的需求保证了异构电路模块的集成。因此，不同设计领域之间的传统界限正在迅速消失。此外，几何和物理参数的可变性及其对系统性能的影响也是另一个主要问题。这种不确定性在设计层次的各个层次都是不可避免的。例如，制造不确定性会显著影响片上互连的性能，导致时序变化，这种变化会传播到电路或板级，对整个系统的性能和产量产生负面影响。该研究建议呼吁通过促进“无障碍设计”作为设计过程中的主要成分，在基础设计算法和方法的发展中进行范式转变。作为实现这一目标的一步，计划中的几项研究活动都集中在开发专门的随机算法，以建模和模拟设计层次结构不同级别的底层统计信息。此外，系统的方法将被开发，将这些算法在thedesign周期，以实现最佳的设计中心。计划中的研究解决了高速应用中常见的一般战略问题，并将在广泛的相互关联的主题中推进最先进的技术。这项研究的成功将使设计人员能够有效地规划和设计目前不可行的大规模系统，从而产生上级和更可靠的多功能电子和通信产品。此外，拟议研究的好处不仅限于高速电子系统的设计，因为大规模和不确定性量化的挑战是工程和科学中其他几个领域的共同问题。

Therapid evolution of the global electronic industry is unceasingly introducingnew products operating at ever higher frequencies and bitrates. At such highdata rates, high-frequency effects become the dominant factor limiting theoverall performance of microelectronic systems. In addition, the fast risingdemand for multifunction and miniature products warrants integration ofheterogeneous circuit modules. As a result, the traditional boundaries betweendifferent design domains are fast vanishing. Moreover, variability of thegeometrical and physical parameters and its effect on the system performance isadding another major concern. This uncertainty becomes inevitable at all levelsof the design hierarchy. For example, manufacturing uncertainties cansignificantly influence the performance of on-chip interconnects, leading totiming variations that can propagate to the circuit or board level withnegative impact on the whole system performance and yield. The researchproposal calls for a paradigm shift in the development of the underlying designalgorithms and methodologies by promoting “Design for Uncertainties” as a majoringredient in the design process. As a step towards this goal, several of theplanned research activities are focused on the development of specializedstochastic algorithms to model and simulate the underlying statisticalinformation at different levels of the design hierarchy. In addition,systematic methods will be developed to incorporate these algorithms in thedesign cycle to achieve optimal design centering. The planned researchaddresses generic strategic issues common to high-speed applications and willadvance the state-of-art in a broad spectrum of interrelated topics. Thesuccess of the proposed research will provide designers with the ability toefficiently plan and design large-scale systems that are not currentlyfeasible; resulting in superior and more reliable multi-function electronic andcommunication products. In addition, the benefits of the proposed research are notlimited to the design of high-speed electronic systems since large-scale anduncertainty quantification challenges are common issues in several other fieldswithin engineering and science.