Impact of remnant stress/strain and metal contamination in 3D-LSIs with through-Si vias fabricated by wafer thinning and bonding
Impact of remnant stress/strain and metal contamination in 3D-LSIs with through-Si vias fabricated by wafer thinning and bonding
复制标题
通过晶圆减薄和键合制造的硅通孔 3D-LSI 中残余应力/应变和金属污染的影响
DOI：
10.1109/iedm.2009.5424348
复制
发表时间：
2009
期刊：
影响因子：
--
通讯作者：
M. Koyanagi
中科院分区：
文献类型：
--
作者：
M. Murugesan;J. Bea;H. Kino;Y. Ohara;T. Kojima;A. Noriki;K. Lee;K. Kiyoyama;T. Fukushima;H. Nohira;T. Hattori;E. Ikenaga;T. Tanaka;M. Koyanagi
晶圆减薄以及硅通孔 (TSV) 和金属微凸块的形成是 3D LSI 制造中的关键工艺。然而，它可能会在减薄的晶圆中引入机械应力和晶体缺陷。此外，用于 TSV 和微凸块的 Cu 可能会在薄化的 Si 衬底中引入金属污染。然后研究了机械应力和金属污染对减薄硅衬底的影响。通过显微拉曼光谱 (μRS) 和 XPS 评估晶圆减薄后留下的残余应力。发现晶圆减薄后，机械应力残留在硅衬底的背面，并且该机械应力的一部分出现在硅衬底的表面。已经通过C-t方法评估了这种减薄的Si衬底中的金属污染。结果发现，在 200 °C 的相对低温下，Cu 扩散到 Si 衬底中会降低载流子生成寿命。还评估了晶圆键合后减薄硅衬底中的机械应力/应变，以研究金属微凸块对减薄硅衬底的影响。研究发现，微凸块在硅衬底表面产生局部机械应力。该局部应力导致 MOS 晶体管的导通电流发生 3% 的变化。
Wafer thinning and formation of through-Si via (TSV) and metal microbump are key processes in 3D LSI fabrication. However, it might introduce mechanical stress and crystal defects in thinned wafers. In addition, Cu for TSV and microbump might introduce metal contamination in thinned Si substrate. Then the impact of mechanical stress and metal contamination in the thinned Si substrate has been investigated. The remnant stress left after wafer thinning was evaluated by micro-Raman spectroscopy (µRS) and XPS. It was found that the mechanical stress remained in the back surface of Si substrate after wafer thinning and a part of this mechanical stress appeared in the surface of Si substrate. The metal contamination in such thinned Si substrate has been evaluated by a C-t method. It was found that the carrier generation lifetime was degraded by Cu diffused into Si substrate at relatively low temperature of 200 °C. The mechanical stress/strain in the thinned Si substrate after wafer bonding was also evaluated to investigate the influences of metal microbumps to the thinned Si substrate. It was found that the local mechanical stress was generated in the Si substrate surface by the microbumps. This local stress caused a 3% change in the ON current of MOS transistor.
影响因子：
20.6
作者：
M. Koyanagi;T. Fukushima;Tetsu Tanaka
通讯作者：
M. Koyanagi;T. Fukushima;Tetsu Tanaka