Deep Learning Side-Channel Attack Resilient AES-256 using Current Domain Signature Attenuation in 65nm CMOS
Deep Learning Side-Channel Attack Resilient AES-256 using Current Domain Signature Attenuation in 65nm CMOS
复制标题
使用 65nm CMOS 中的电流域特征衰减的深度学习抗侧通道攻击 AES-256
DOI：
10.1109/cicc48029.2020.9075889
复制
发表时间：
2020
期刊：
影响因子：
--
通讯作者：
Sen, Shreyas
中科院分区：
文献类型：
--
作者：
Das, Debayan;Danial, Josef;Golder, Anupam;Ghosh, Santosh;Wdhury, Arijit Raycho;Sen, Shreyas
本文首次展示了一种有效的电路级对策，以防止对加密设备进行基于深度学习的边信道分析（DLSCA）攻击。机器学习（ML） SCA，特别是DLSCA攻击已被证明是非常有效的，因为它可以通过低至单个跟踪来潜在地揭示加密设备的密钥，通过卸载模型学习密钥的相关泄漏模式的分析阶段的繁重工作。本研究提出了一种电流域签名衰减（CDSA）硬件，该硬件嵌入了采用65nm CMOS技术制造的AES256引擎，可以在电流签名到达攻击者可访问的电源引脚之前将其抑制在> 350x。测量结果表明，仅使用<；未受保护的AES256的5K功率走线，而受保护的CDSA-AES256的DNN模型即使使用10M走线也无法训练。
This article, for the first time, demonstrates an efficient circuit-level countermeasure to prevent deep-learning based side-channel analysis (DLSCA) attacks on encryption devices. Machine learning (ML) SCA, particularly DLSCA attacks have been shown to be extremely effective as it can potentially reveal the secret key of the cryptographic device with as low as a single trace, by offloading the heavy-lifting on the profiling phase where the model learns the correlated leakage patterns of the key. This work presents a current-domain signature attenuation (CDSA) hardware embedding an AES256 engine fabricated in 65nm CMOS technology to suppress the current signature by >350× before it reaches the power supply pin accessible to an attacker. Measurement results show that a 256-class deep neural network (DNN) model for DLSCA attack can be fully trained (>99.9% test accuracy) using only <; 5K power traces from the unprotected AES256, while the DNN model for the protected CDSA-AES256 cannot be trained even with 10M traces.
DOI：
10.1109/tcsi.2018.2819499
发表时间：
2018-10-01
影响因子：
5.1
作者：
Das, Debayan;Maity, Shovan;Sen, Shreyas
通讯作者：
Sen, Shreyas