ASIC Implementation of a Nonlinear Dynamical Model for Hippocampal Prosthesis

ASIC Implementation of a Nonlinear Dynamical Model for Hippocampal Prosthesis
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海马假体非线性动力学模型的 ASIC 实现

DOI:
10.1162/neco_a_01107
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发表时间:
2018-09
期刊:
影响因子:
2.9
通讯作者:
Ray C. C. Cheung
Ray C. C. Cheung
中科院分区:
计算机科学4区
文献类型:
--
作者:
Zhitong Qiao;Yan Han;Xiaoxia Han;Han Xu;Will X. Y. Li(李翔宇);Dong Song;Theodore W. Berger;Ray C. C. Cheung

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海马假体是一种超大规模集成(VLSI)生物芯片,需要植入生物大脑中以解决认知功能障碍。在这封信中,我们提出了一种新的低复杂度,小面积,低功耗的可编程海马神经网络专用集成电路(ASIC)的海马假体。它是基于海马的非线性动力学模型:即多输入,多输出(MIMO)-广义Laguerre-Volterra模型(GLVM)。它可以实现对海马神经元活动的实时预测。提出了新的硬件结构、存储空间配置方案、低功耗卷积和高斯随机数发生器模块。该ASIC采用40 nm工艺制作,核心面积为0.122 mm 2,测试功率为84.4 μW。实验结果表明,与基于传统架构的设计相比,该芯片的核心面积减少了84.94%,核心功耗降低了24.30%。
A hippocampal prosthesis is a very large scale integration (VLSI) biochip that needs to be implanted in the biological brain to solve a cognitive dysfunction. In this letter, we propose a novel low-complexity, small-area, and low-power programmable hippocampal neural network application-specific integrated circuit (ASIC) for a hippocampal prosthesis. It is based on the nonlinear dynamical model of the hippocampus: namely multi-input, multi-output (MIMO)–generalized Laguerre-Volterra model (GLVM). It can realize the real-time prediction of hippocampal neural activity. New hardware architecture, a storage space configuration scheme, low-power convolution, and gaussian random number generator modules are proposed. The ASIC is fabricated in 40 nm technology with a core area of 0.122 mm2 and test power of 84.4 μW. Compared with the design based on the traditional architecture, experimental results show that the core area of the chip is reduced by 84.94% and the core power is reduced by 24.30%.
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