Analysis of Power-via-Induced Quasi-Quarter-Wavelength Resonance to Reduce Crosstalk

Analysis of Power-via-Induced Quasi-Quarter-Wavelength Resonance to Reduce Crosstalk
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分析电源通孔引起的准四分之一波长谐振以减少串扰

DOI:
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发表时间:
2022
期刊:
IEEE Transactions on Signal and Power Integrity
影响因子:
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通讯作者:
Donghyun Kim
Donghyun Kim
中科院分区:
--
文献类型:
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作者:
S. Bai;Yuanzhuo Liu;Jongjoo Lee;Bichen Chen;Srinivasan Venkataraman;Xu Wang;Bo Pu;Jun Fan;Donghyun Kim

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目前,电源引脚越来越多地用于封装设计,以达到双重目的:支持高速信号之间的串扰隔离,并为串行器/串行器输入/输出提供电源输送。这种方法可以减少总引脚数,并随后限制封装体尺寸以保持在球栅阵列形状因子内。然而,对于其中功率通孔与信号通孔相邻的印刷电路板(PCB),由于功率通孔短截线的准四分之一波长谐振,可以观察到增加的远端串扰(FEXT)和插入损耗中的谐振。使用的分析模型和3-D全波仿真模型,提出了一个物理解释,这种意外的谐振在差分信号对。考虑到改变IC封装的引脚图的困难,提出了几种PCB布局,以消除功率通孔诱导的准四分之一波长谐振,而不需要改变封装引脚图。在应用所提出的方法时,谐振被消除,并且FEXT被减小。
Currently, power pins are increasingly used in package design to serve a dual purpose: to support crosstalk isolation between high-speed signals and to provide power delivery to serializer/deserializer input/output. This approach can reduce the overall pin count and subsequently limit the package body size to remain within a ball grid array form factor. However, for printed circuit boards (PCBs) in which power vias are adjacent to signal vias, increased far-end crosstalk (FEXT) and resonance in insertion loss can be observed, due to the quasi-quarter-wavelength resonance of the power via stub. Using an analytical model and 3-D full-wave simulation models, a physical explanation for this unexpected resonance in differential signal pairs is proposed. Considering the difficulty in changing the pin map of the IC package, several PCB layouts are proposed to eliminate the power-via-induced quasi-quarter-wavelength resonance without the need to change the package pin map. Upon application of the proposed methods, the resonance is eliminated, and the FEXT is reduced.
信号完整性:高效、基于物理的建模:返回路径、阻抗和短截线效应控制
DOI: 10.1109/memc.2014.6798802
发表时间: 2014
期刊: IEEE Electromagnetic Compatibility Magazine
影响因子: --
作者:
J. Fan;A. Hardock;R. Rimolo-Donadio;S. Müller;Y. H. Kwark;C. Schuster
通讯作者: C. Schuster