Quaternary edge-triggered flip-flop with neuron-MOS literal circuit
Quaternary edge-triggered flip-flop with neuron-MOS literal circuit
复制标题
带神经元-MOS文字电路的四进制边沿触发触发器
DOI：
10.1109/icnc.2013.6818264
复制
发表时间：
2013
期刊：
影响因子：
--
通讯作者：
X. You
中科院分区：
文献类型：
--
作者：
G. Hang;Xuanchang Zhou;Yang Yang;Xiaohui Hu;X. You
提出了一种新颖的CMOS四值D型边沿触发器，它采用单锁存器和神经元MOS文字电路。在所提出的电路中，数据被采样到锁存器在一个短暂的透明周期的时钟信号的上升沿，通过使用由时钟信号的竞争冒险产生的箭头脉冲。四元文字功能是通过使用神经元MOS晶体管实现的，而不需要对阈值进行任何修改。所提出的电压模式四值触发器的好处是，电路可以通过标准CMOS工艺与2-poly层制造。此外，相对于以前报道的四值触发器，它具有更简单的结构。采用TSMC 0.35μ m2-poly 4-metal CMOS工艺，HSPICE仿真结果验证了该电路的有效性.
A novel CMOS quaternary D-type edge-triggered flip-flop using a single latch with neuron-MOS literal circuits is presented. In the proposed circuit, data are sampled into the latch during a short transparency period for rising edge of the clock signal by using the arrow pulse produced by the race-hazard of the clock signal. The quaternary literal functions are realized by using neuron-MOS transistors without any modification of the thresholds. The benefit of the proposed voltage-mode quaternary flip-flop is that the circuit can be fabricated by standard CMOS process with a 2-ploy layer. Besides, it has a simpler construction with respect to previously reported quaternary flip-flop. The effectiveness of the proposed circuit has been validated by HSPICE simulation results with TSMC 0.35μm 2-ploy 4-metal CMOS technology.
DOI：
10.1109/tcsi.2009.2028751
发表时间：
2010-06-01
影响因子：
5.1
作者：
Chen, Jun;Shibata, Tadashi
通讯作者：
Shibata, Tadashi