A Θ( √ n)-depth quantum adder on the 2D NTC quantum computer architecture

A Θ( √ n)-depth quantum adder on the 2D NTC quantum computer architecture
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二维 NTC 量子计算机架构上的 θ(√n) 深度量子加法器

DOI:
10.1145/2287696.2287707
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发表时间:
2010
期刊:
ACM J. Emerg. Technol. Comput. Syst.
影响因子:
--
通讯作者:
R. V. Meter
R. V. Meter
中科院分区:
--
文献类型:
--
作者:
Byung;R. V. Meter

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在这项工作中,我们提出了一个加法器的2维最近邻,双量子比特门,并发(2D NTC)架构,旨在匹配许多量子计算技术的架构约束。所选择的架构允许在具有n列的二维中布局逻辑量子位,其中每列具有n个量子位,并且仅在最近邻相互作用的情况下并行执行单量子位和双量子位门。建议的加法器工作在三个阶段。在第一阶段,第一列生成求和输出,其他列执行超前进位操作。在第二阶段,这些中间值从一列传播到另一列,为每个寄存器位置的最后进位的计算做准备。在最后一个阶段,除第一列外的每一列都使用此列级进位生成求和输出。加法器的深度和量子位数分别为Θ(n)和O(n)。当输入寄存器的长度n大于51时,该加法器的执行速度比为一维NTC结构设计的加法器快。
In this work, we propose an adder for the 2-Dimensional Nearest-Neighbor, Two-Qubit gate, Concurrent (2D NTC) architecture, designed to match the architectural constraints of many quantum computing technologies. The chosen architecture allows the layout of logical qubits in two dimensions with &sqrt;n columns where each column has &sqrt;n qubits and the concurrent execution of one- and two-qubit gates with nearest-neighbor interaction only. The proposed adder works in three phases. In the first phase, the first column generates the summation output and the other columns do the carry-lookahead operations. In the second phase, these intermediate values are propagated from column to column, preparing for computation of the final carry for each register position. In the last phase, each column, except the first one, generates the summation output using this column-level carry. The depth and the number of qubits of the proposed adder are Θ(&sqrt;n) and O(n), respectively. The proposed adder executes faster than the adders designed for the 1D NTC architecture when the length of the input registers n is larger than 51.
DOI: 10.1103/physreva.54.1098
发表时间: 1996-08-01
期刊: PHYSICAL REVIEW A
影响因子: 2.9
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通讯作者: Shor, PW
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影响因子: --
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