Breaking the Oblivious-RAM Bandwidth Wall
Breaking the Oblivious-RAM Bandwidth Wall
复制标题
打破 Oblivious-RAM 带宽墙
DOI：
10.1109/iccd.2018.00026
复制
发表时间：
2018
期刊：
影响因子：
--
通讯作者：
Khan, Omer
中科院分区：
文献类型：
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作者：
Omar, Hamza;Haider, Syed Kamran;Ren, Ling;van Dijk, Marten;Khan, Omer
PathORAM是一种流行的安全原语，用于混淆从安全处理器到不安全主存储器的存储器访问模式。新兴的吞吐量多核和GPU处理器通过多个片上内存控制器提供了巨大的内存带宽。PathORAM将单个片外缓存行访问转换为约100个缓存行，从而对可用内存带宽造成压力。然而，当前PathORAM方案显示随着存储器控制器数量的增加带宽利用率降低。带宽利用率的这种剥夺主要是由于PathORAM福尔斯在所有可用的片上存储器控制器之间的存储器访问的成比例分布方面不足。本文提出了一种新的ORAM路径分配方案，确保并行片上存储器控制器之间的平衡负载分配，从而提高安全处理器的性能约24%，比最先进的PathORAM方案。
PathORAM is a popular security primitive for obfuscating memory access patterns from a secure processor to an insecure main memory. Emerging throughput multicore and GPU processors provide immense memory bandwidth via multiple on-chip memory controllers. PathORAM translates a single off-chip cache line access into ~100 cache lines, thereby stressing the available memory bandwidth. However, current PathORAM scheme shows degradation of bandwidth utilization with an increase in the number of memory controllers. This deprivation in bandwidth utilization is primarily due to the fact that PathORAM falls short in proportionate distribution of memory accesses among all available on-chip memory controllers. This paper presents a novel ORAM path distribution scheme that ensures balanced load distribution among parallel on-chip memory controllers, and consequently improves secure processor performance by ~24% over state-of-the-art PathORAM scheme.
NoC 对 3D 堆叠存储器的性能影响：来自混合存储器立方体的见解
DOI：
10.1109/ispass.2018.00018
发表时间：
2018
期刊：
IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS
影响因子：
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作者：
Hadidi, Ramyad;Asgari, Bahar;Young, Jeffrey;Ahmad Mudassar, Burhan;Garg, Kartikay;Krishna, Tushar;Kim, Hyesoon
通讯作者：
Kim, Hyesoon