Hardware Obfuscation and Logic Locking: A Tutorial Introduction

Hardware Obfuscation and Logic Locking: A Tutorial Introduction
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硬件混淆和逻辑锁定:教程简介

DOI:
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发表时间:
2020
期刊:
影响因子:
2
通讯作者:
S. Bhunia
S. Bhunia
中科院分区:
工程技术4区
文献类型:
--
作者:
Tamzidul Hoque;R. Chakraborty;S. Bhunia

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编者按:如果您正在设计硬件IP块或将其集成到设计中,并且您正在使用通用的全球供应链,则必须阅读这篇关于如何保护您的IP免受逆向工程、盗版和恶意更改攻击的概述文章。作者全面概述了当前可用于RTL、门级和布局级的对策,以保护您的设计,重点关注组合和时序逻辑锁定,并讨论了这些技术的优点、开销和缺点。-Jürgen Teich,FAU埃尔兰根
Editor’s note: If you are designing or integrating hardware IP blocks into your designs, and you are using common global supply chains, then reading this overview article on how to protect your IP against reverse engineering, piracy, and malicious alteration attacks is a must. The authors give a comprehensive overview of current countermeasures that can be used at RTL, gate-, and layout-level to protect your design with a focus on combinational and sequential logic locking and a discussion on merits, overheads, and shortcomings of such techniques. —Jürgen Teich, FAU Erlangen
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DOI: 10.1109/mdat.2017.2729398
发表时间: 2017
期刊: IEEE Design & Test
影响因子: 2
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