Improved Performance of SRAM-Based True Random Number Generator by Leveraging Irradiation Exposure.

Improved Performance of SRAM-Based True Random Number Generator by Leveraging Irradiation Exposure.
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利用辐照曝光改进基于 SRAM 的真随机数生成器的性能

DOI:
10.3390/s20216132
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发表时间:
2020-10-28
期刊:
Sensors (Basel, Switzerland)
影响因子:
--
通讯作者:
Zou S
Zou S
中科院分区:
其他
文献类型:
--
作者:
Zhang X;Jiang C;Dai G;Zhong L;Fang W;Gu K;Xiao G;Ren S;Liu X;Zou S

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加密是保证数据安全传输的重要步骤,而真随机数生成器(TRNG)是许多加密算法的关键组成部分。静态随机存取存储器(SRAM)芯片可以很容易地获得真正随机数的来源,这得益于SRAM单元的噪声,其启动值在不同的上电周期之间翻转。从这一现象出发,提出了一种新的基于sram的TRNG性能(即随机性和吞吐量)改进方法,其实现可分为两个阶段:辐照曝光和硬件后处理。由于SRAM原始上电值的随机性较低,利用电离辐照增强其随机性,在总电离辐照(TID)实验中,最小熵值可从0.03左右提高到0.7以上。此外,虽然数据残留效应阻碍了高速随机比特流的获取,但电离辐照也可以减弱这种影响,提高TRNG的吞吐量。在硬件后处理阶段,在时钟频率为200mhz的现场可编程门阵列(FPGA)上实现了安全哈希算法256 (SHA-256)。它可以产生与美国国家标准与技术研究所(NIST) SP 800-22兼容的真正随机比特流,吞吐量为178 Mbps,利用具有1mbit内存容量的SRAM芯片。此外,根据不同的应用场景,可以通过调整时钟频率和SRAM内存容量来广泛扩展吞吐量,这使得新颖的TRNG设计适用于各种物联网(IOT)设备。
Encryption is an important step for secure data transmission, and a true random number generator (TRNG) is a key building block in many encryption algorithms. Static random-access memory (SRAM) chips can be easily available sources of true random numbers, benefiting from noisy SRAM cells whose start-up values flip between different power-on cycles. Embarking from this phenomenon, a novel performance (i.e., randomness and throughput) improvement method of SRAM-based TRNG is proposed, and its implementation can be divided into two phases: irradiation exposure and hardware postprocessing. As the randomness of original SRAM power-on values is fairly low, ionization irradiation is utilized to enhance its randomness, and the min-entropy can increase from about 0.03 to above 0.7 in the total ionizing irradiation (TID) experiments. Additionally, while the data remanence effect hampers obtaining random bitstreams with high speed, the ionization irradiation can also weaken this impact and improve the throughput of TRNG. In the hardware postprocessing stage, Secure Hash Algorithm 256 (SHA-256) is implemented on a Field Programmable Gate Array (FPGA) with clock frequency of 200 MHz. It can generate National Institute of Standards and Technology (NIST) SP 800-22 compatible true random bitstreams with throughput of 178 Mbps utilizing SRAM chip with 1 Mbit memory capacity. Furthermore, according to different application scenarios, the throughput can be widely scalable by adjusting clock frequency and SRAM memory capacity, which makes the novel TRNG design applicable for various Internet of Things (IOT) devices.
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