Probing Assessment Framework and Evaluation of Antiprobing Solutions

Probing attacks against integrated circuits has become a serious concern, especially for security-critical applications. With the help of modern circuit editing tools, an attacker could remove layers of materials and expose wires carrying sensitive on-chip assets, such as cryptographic keys and proprietary firmware, for probing. Most of the existing protection methods use an active shield that provides tamper-evident covers at the top-most metal layers to the circuitry below. However, they lack formal proofs of their effectiveness as some active shields have already been circumvented by hackers. In this paper, we investigate the problem of protection against front-side probing attacks and propose a framework to assess a design’s vulnerabilities against probing attacks. Metrics are developed to evaluate the resilience of designs to bypass an attack and reroute the attack, the two common techniques used to compromise an antiprobing mechanism. Exemplary assets from a system-on-chip layout are used to evaluate the proposed flow. The results show that long net and high layer wires are vulnerable to a probing attack equipped with high aspect ratio focused ion beam. Meanwhile, nets that occupy small area on the chip are probably compromised through rerouting shield wires. On the other hand, the multilayer internal orthogonal shield performs the best among common shield structures.

对综合电路的探测已成为一个严重的关注，尤其是在现代巡回编辑工具的帮助下，攻击者可以删除材料层，并揭示携带敏感的芯片上的电线固件，用于探测大多数现有的保护方法，使用的是在最高的金属层上提供篡改的掩护在本文中，我们调查了针对前侧探测攻击的问题，并提出了一个框架，以评估设计攻击的漏洞用于妥协的两种常见技术，用于芯片机制的示例性资产。聚焦的离子束。