Brain-Inspired Computing for Circuit Reliability Characterization
Brain-Inspired Computing for Circuit Reliability Characterization
复制标题
用于电路可靠性表征的类脑计算
DOI：
10.1109/tc.2022.3151857
复制
发表时间：
2022
影响因子：
3.7
通讯作者：
H. Amrouch
中科院分区：
文献类型：
--
作者：
P. Genssler;H. Amrouch
晶体管的缩放逐渐接近基本极限。维持电路的可靠性成为铸造厂及其制造工艺面临的巨大挑战。因此，早期和快速表征影响电路晶体管的退化效应变得至关重要。这种退化效应是由制造变化引起的设计时间变化和/或晶体管老化引起的运行时间变化引起的。在这项工作中，我们是第一个使用大脑启发的HDC来实现电路可靠性的。HDC正迅速成为一种有吸引力的轻量级机器学习解决方案。目前，它主要应用于生物信号处理或语言识别。我们通过展示如何应用HDC来解决电路可靠性方面的挑战，将HDC的研究提升到一个新的水平。这具有深远的影响，因为通过以下方式实现了大量节省：1)减少了训练数据的数量，从而缩短了开发周期；2)消除了将数据发送到云端进行模型训练的需要；3)由于快速的边缘推理，大大加快了表征和分类任务。我们以SRAM和其他电路为例证明了HDC的可行性。HDC在精度上优于传统的机器学习方法，如支持向量机或随机森林，并且需要的训练样本减少了20倍。对于给定的样本预算，HDC的误差要小4倍。我们的实现和分析是基于工业<inline-formula>< text -math notation="LaTeX">$14 \；\mathrm{n}\mathrm{m}$</ text -math><alternatives><mml:math><mml:mrow><mml:mn>14</mml:mn><mml:mspace width="0.166667em"/><mml:mi mathvariant="normal">n</mml:mi><mml:mi mathvariant="normal">m</mml:mi></mml:mrow></mml:math><inline-graphic xlink:href=" gensler -ieq1-3151857.gif"/></alternatives></inline-formula> FinFET完全校准与英特尔测量有关的晶体管电气特性以及制造变变性。开源：</italic>我们的框架包括算法实现可用于社区探索其他算法和电路<uri>https://github.com/ML-CAD/HDC-Circuit-Reliability</uri>。
Transistor scaling steadily approaches fundamental limits. Sustaining circuit reliability becomes an overwhelming challenge for foundries and their manufacturing processes. Therefore, early and rapid characterization of degradation effects impacting the circuits’ transistors becomes essential. Such degradation effects are caused by design-time variation due to manufacturing variability and/or run-time variation due to transistor aging. In this work, we are the first to employ brain-inspired HDC for circuit reliability. HDC is quickly emerging as an attractive light-weight machine-learning solution. Nowadays, it is mainly applied to bio-signal processing or language recognition. We bring the research of HDC to the next level by demonstrating how it can be applied to address the challenges in circuit reliability. This has far-reaching consequences due to the large savings achieved by 1) reducing the amount of training data and hence the development cycle, 2) removing the need to send the data to the cloud for model training, and 3) speeding up significantly the characterization and classification tasks due to the fast edge-inference. We demonstrate the viability of HDC using SRAM and other circuits as examples. HDC outperforms traditional machine learning methods, such as support vector machine or random forest, in accuracy and requires up to 20x fewer training samples. For a given budget of samples, HDC achieves a 4x smaller error. Our implementation and analysis are based on industrial <inline-formula><tex-math notation="LaTeX">$14 \;\mathrm{n}\mathrm{m}$</tex-math><alternatives><mml:math><mml:mrow><mml:mn>14</mml:mn><mml:mspace width="0.166667em"/><mml:mi mathvariant="normal">n</mml:mi><mml:mi mathvariant="normal">m</mml:mi></mml:mrow></mml:math><inline-graphic xlink:href="genssler-ieq1-3151857.gif"/></alternatives></inline-formula> FinFET fully calibrated with Intel measurements with respect to both transistor electrical characteristics as well as manufacturing variability. <italic>Open Source:</italic> Our framework including the algorithm implementation is available for the community to explore other algorithms and circuits at <uri>https://github.com/ML-CAD/HDC-Circuit-Reliability</uri>.
DOI：
--
发表时间：
2021-03
期刊：
ArXiv
影响因子：
--
作者：
T. Basaklar;Y. Tuncel;S. Y. Narayana;S. Gumussoy;U. Ogras
通讯作者：
T. Basaklar;Y. Tuncel;S. Y. Narayana;S. Gumussoy;U. Ogras
tiny-HD：适用于物联网应用的超高效超维计算引擎
DOI：
10.23919/date51398.2021.9473920
发表时间：
2021
期刊：
and Testing in Europe (DATE
影响因子：
--
作者：
Khaleghi, B.
通讯作者：
Khaleghi, B.
基于运行时压力监控的细粒度老化引起的延迟预测
DOI：
10.1109/tcad.2016.2620903
发表时间：
2017
影响因子：
2.9
作者：
A. Vijayan;A. Koneru;S. Kiamehr;K. Chakrabarty;M.B. Tahoori
通讯作者：
M.B. Tahoori