Decoupled Vector Runahead
Decoupled Vector Runahead
复制标题
解耦矢量超前运行
DOI：
10.1145/3613424.3614255
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发表时间：
2023
期刊：
影响因子：
--
通讯作者：
Naithani A
中科院分区：
文献类型：
--
作者：
Naithani A
我们提出了解耦矢量Runahead（DVR），一个核心的预取技术，单独执行的主应用程序线程，利用大量的内存级并行，以提高性能的应用程序具有间接内存访问。DVR在运行时动态地推断循环边界，识别跨越式负载，并对作为间接链的一部分的后续指令进行向量化。它主动发出内存访问的结果加载到遥远的未来，即使在无序的核心还没有停止，把他们的数据到L1缓存，从而提供及时的预取主线程。DVR可以在运行时调整矢量化的程度，跨内部循环的多次调用对相同的间接内存访问链进行矢量化，并有效地处理沿着矢量化链的分支发散。DVR作为一个随需应变的、推测性的、有序的、轻量级的硬件子线程与核心内的主线程一起运行，并且仅产生1139字节的最小硬件开销。相对于大型超标量5宽无序基线和Vector Runahead（一种用于加速无序处理器上间接内存访问的最新微架构技术），DVR分别为一组图形分析、数据库和HPC工作负载提供了2.4倍和2倍的性能。
We present Decoupled Vector Runahead (DVR), an in-core prefetching technique, executing separately to the main application thread, that exploits massive amounts of memory-level parallelism to improve the performance of applications featuring indirect memory accesses. DVR dynamically infers loop bounds at run-time, recognizing striding loads, and vectorizing subsequent instructions that are part of an indirect chain. It proactively issues memory accesses for the resulting loads far into the future, even when the out-of-order core has not yet stalled, bringing their data into the L1 cache, and thus providing timely prefetches for the main thread. DVR can adjust the degree of vectorization at run-time, vectorize the same chain of indirect memory accesses across multiple invocations of an inner loop, and efficiently handle branch divergence along the vectorized chain. DVR runs as an on-demand, speculative, in-order, lightweight hardware subthread alongside the main thread within the core and incurs a minimal hardware overhead of only 1139 bytes. Relative to a large superscalar 5-wide out-of-order baseline and Vector Runahead — a recent microarchitectural technique to accelerate indirect memory accesses on out-of-order processors — DVR delivers 2.4 × and 2 × higher performance, respectively, for a set of graph analytics, database, and HPC workloads.
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发表时间：
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期刊：
2016 49th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO)
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