Compiler-Directed Functional Unit Shutdown for Microarchitecture Power Optimization
Compiler-Directed Functional Unit Shutdown for Microarchitecture Power Optimization
复制标题
编译器控制的功能单元关闭以实现微架构功耗优化
DOI：
10.1109/pccc.2007.358916
复制
发表时间：
2007
期刊：
影响因子：
--
通讯作者：
Jeanine E. Cook
中科院分区：
文献类型：
--
作者：
Santosh Talli;R. Srinivasan;Jeanine E. Cook
泄漏功率是当前微架构中的主要关注点，因为它随着晶体管特征尺寸的减小而呈指数级增加。在本文中，我们提出了一种技术，称为功能单元关机，以减少静态泄漏功耗的微处理器的电源门控功能单元时，不使用。我们使用配置文件信息来识别功能单元空闲周期，编译器使用该周期来发出相应的OFF/ON指令。在空闲时段期间进行功率门控的决定是基于保持单元开启所消耗的能量与使它们功率循环所涉及的开销和泄漏能量之间的比较来做出的。该比较识别短空闲周期，其中如果功能单元保持开启而不是在该周期期间循环功率，则消耗较少的功率。结果表明，该技术节省了总能量的18%，平均在4%至11%之间，性能下降1%。
Leakage power is a major concern in current microarchitectures as it is increasing exponentially with decreasing transistor feature sizes. In this paper, we present a technique called functional unit shutdown to reduce the static leakage power consumption of a microprocessor by power gating functional units when not used. We use profile information to identify functional unit idle periods that is used by the compiler to issue corresponding OFF/ON instructions. The decision to power gate during idle periods is made based on the comparison between the energy consumed by leaving the units ON and the overhead and leakage energy involved in power cycling them. This comparison identifies short idle periods where less power is consumed if a functional unit is left ON rather than cycling the power during that period. The results show that this technique saves up to 18% of the total energy and between 4 and 11% on average with a performance degradation of 1%.
DOI：
--
发表时间：
2023
期刊：
--
影响因子：
--
作者：
D. Brooks;V. Tiwari;Intel Margaret Martonosi
通讯作者：
D. Brooks;V. Tiwari;Intel Margaret Martonosi
影响因子：
2.2
作者：
Henning, JL
通讯作者：
Henning, JL